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Fingerprint Dive into the research topics where Yusuke Matsunaga is active. These topic labels come from the works of this person. Together they form a unique fingerprint.

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Research Output

An Efficient SAT-Attack Algorithm Against Logic Encryption

Matsunaga, Y. & Yoshimura, M., Jul 2019, 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design, IOLTS 2019. Gizopoulos, D., Alexandrescu, D., Papavramidou, P. & Maniatakos, M. (eds.). Institute of Electrical and Electronics Engineers Inc., p. 44-47 4 p. 8854466. (2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design, IOLTS 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • An accelerating technique for SAT-based ATPG

    Matsunaga, Y., Feb 2017, In : IPSJ Transactions on System LSI Design Methodology. 10, p. 39-44 6 p.

    Research output: Contribution to journalArticle

  • 1 Citation (Scopus)
  • Accelerating SAT-based Boolean matching for heterogeneous FPGAs using one-hot encoding and CEGAR technique

    Matsunaga, Y., Mar 11 2015, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., p. 255-260 6 p. 7059014. (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  • 7 Citations (Scopus)