### Abstract

Binary-Swap is a parallel image compositing algorithm based on recursive vector halving and distance doubling, and works efficiently when the number of processes is exactly a power-of-two (2^{n}). Several power-of-two converting approaches for Binary-Swap have been proposed. Among them, the Telescope method, based on the Binary Blocks algorithm, has been shown as the most promising approach. The Telescope method decomposes an entire set of processes into blocks of power-of-two size and merges the smaller blocks into larger blocks in stepwise fashion. This block merging process corresponds to the communication and computational overhead of the conversion, and since it can only merge one block per stage, it becomes inefficient as the number of binary blocks increases. In this paper, we focus on a single-stage conversion method using the 3-2 and 2-1 elimination approaches. The original scheduling method, proposed by Rabenseifner et al., is limited to an odd number of processes since it always schedules a single 3-2 elimination per conversion. Taking into consideration that the 3-2 elimination can be optimized on modern HPC systems, which can overlap the communication and computation, we propose 234 Scheduling for scheduling multiple 3-2 eliminations per conversion. The multiple 3-2 elimination scheduling enlarges the application range by enabling its use on an even number of processes. We evaluated 234 Scheduling applied to Binary-Swap on the K computer, which is a modern parallel HPC system, and confirmed its effectiveness.

Original language | English |
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Title of host publication | Proceedings of the 2015 International Conference on High Performance Computing and Simulation, HPCS 2015 |

Editors | Vesna Zeljkovic, Waleed W. Smari |

Publisher | Institute of Electrical and Electronics Engineers Inc. |

Pages | 421-428 |

Number of pages | 8 |

ISBN (Electronic) | 9781467378123 |

DOIs | |

Publication status | Published - Sep 2 2015 |

Event | 13th International Conference on High Performance Computing and Simulation, HPCS 2015 - Amsterdam, Netherlands Duration: Jul 20 2015 → Jul 24 2015 |

### Publication series

Name | Proceedings of the 2015 International Conference on High Performance Computing and Simulation, HPCS 2015 |
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### Other

Other | 13th International Conference on High Performance Computing and Simulation, HPCS 2015 |
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Country | Netherlands |

City | Amsterdam |

Period | 7/20/15 → 7/24/15 |

### Fingerprint

### All Science Journal Classification (ASJC) codes

- Computer Networks and Communications
- Hardware and Architecture
- Modelling and Simulation

### Cite this

*Proceedings of the 2015 International Conference on High Performance Computing and Simulation, HPCS 2015*(pp. 421-428). [7237071] (Proceedings of the 2015 International Conference on High Performance Computing and Simulation, HPCS 2015). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/HPCSim.2015.7237071

**234 scheduling of 3-2 and 2-1 eliminations for parallel image compositing using non-power-of-two number of processes.** / Nonaka, Jorji; Ono, Kenji; Fujita, Masahiro.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

*Proceedings of the 2015 International Conference on High Performance Computing and Simulation, HPCS 2015.*, 7237071, Proceedings of the 2015 International Conference on High Performance Computing and Simulation, HPCS 2015, Institute of Electrical and Electronics Engineers Inc., pp. 421-428, 13th International Conference on High Performance Computing and Simulation, HPCS 2015, Amsterdam, Netherlands, 7/20/15. https://doi.org/10.1109/HPCSim.2015.7237071

}

TY - GEN

T1 - 234 scheduling of 3-2 and 2-1 eliminations for parallel image compositing using non-power-of-two number of processes

AU - Nonaka, Jorji

AU - Ono, Kenji

AU - Fujita, Masahiro

PY - 2015/9/2

Y1 - 2015/9/2

N2 - Binary-Swap is a parallel image compositing algorithm based on recursive vector halving and distance doubling, and works efficiently when the number of processes is exactly a power-of-two (2n). Several power-of-two converting approaches for Binary-Swap have been proposed. Among them, the Telescope method, based on the Binary Blocks algorithm, has been shown as the most promising approach. The Telescope method decomposes an entire set of processes into blocks of power-of-two size and merges the smaller blocks into larger blocks in stepwise fashion. This block merging process corresponds to the communication and computational overhead of the conversion, and since it can only merge one block per stage, it becomes inefficient as the number of binary blocks increases. In this paper, we focus on a single-stage conversion method using the 3-2 and 2-1 elimination approaches. The original scheduling method, proposed by Rabenseifner et al., is limited to an odd number of processes since it always schedules a single 3-2 elimination per conversion. Taking into consideration that the 3-2 elimination can be optimized on modern HPC systems, which can overlap the communication and computation, we propose 234 Scheduling for scheduling multiple 3-2 eliminations per conversion. The multiple 3-2 elimination scheduling enlarges the application range by enabling its use on an even number of processes. We evaluated 234 Scheduling applied to Binary-Swap on the K computer, which is a modern parallel HPC system, and confirmed its effectiveness.

AB - Binary-Swap is a parallel image compositing algorithm based on recursive vector halving and distance doubling, and works efficiently when the number of processes is exactly a power-of-two (2n). Several power-of-two converting approaches for Binary-Swap have been proposed. Among them, the Telescope method, based on the Binary Blocks algorithm, has been shown as the most promising approach. The Telescope method decomposes an entire set of processes into blocks of power-of-two size and merges the smaller blocks into larger blocks in stepwise fashion. This block merging process corresponds to the communication and computational overhead of the conversion, and since it can only merge one block per stage, it becomes inefficient as the number of binary blocks increases. In this paper, we focus on a single-stage conversion method using the 3-2 and 2-1 elimination approaches. The original scheduling method, proposed by Rabenseifner et al., is limited to an odd number of processes since it always schedules a single 3-2 elimination per conversion. Taking into consideration that the 3-2 elimination can be optimized on modern HPC systems, which can overlap the communication and computation, we propose 234 Scheduling for scheduling multiple 3-2 eliminations per conversion. The multiple 3-2 elimination scheduling enlarges the application range by enabling its use on an even number of processes. We evaluated 234 Scheduling applied to Binary-Swap on the K computer, which is a modern parallel HPC system, and confirmed its effectiveness.

UR - http://www.scopus.com/inward/record.url?scp=84948407928&partnerID=8YFLogxK

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U2 - 10.1109/HPCSim.2015.7237071

DO - 10.1109/HPCSim.2015.7237071

M3 - Conference contribution

AN - SCOPUS:84948407928

T3 - Proceedings of the 2015 International Conference on High Performance Computing and Simulation, HPCS 2015

SP - 421

EP - 428

BT - Proceedings of the 2015 International Conference on High Performance Computing and Simulation, HPCS 2015

A2 - Zeljkovic, Vesna

A2 - Smari, Waleed W.

PB - Institute of Electrical and Electronics Engineers Inc.

ER -