32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic

Koki Ishida; Masamitsu Tanaka; Ikki Nagaoka; Takatsugu Ono; Satoshi Kawakami; Teruo Tanimoto; Akira Fujimaki; Koji Inoue

doi:10.1109/VLSICircuits18222.2020.9162826

32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic

Koki Ishida, Masamitsu Tanaka, Ikki Nagaoka, Takatsugu Ono, Satoshi Kawakami, Teruo Tanimoto, Akira Fujimaki, Koji Inoue

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

20 Citations (Scopus)

Abstract

A Single-Flux-Quantum (SFQ) 4-bit throughput-oriented processor has successfully been demonstrated at up to 32 GHz with the measured power consumption of 6.5 mW. This is the first implementation of the gate-level-pipelined processor, and it achieves 2.5 Tera-Operations Per Watt (TOPS/W) by circuit and architectural optimizations.

Original language	English
Title of host publication	2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728199429
DOIs	https://doi.org/10.1109/VLSICircuits18222.2020.9162826
Publication status	Published - Jun 2020
Event	2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Honolulu, United States Duration: Jun 16 2020 → Jun 19 2020

Publication series

Name	IEEE Symposium on VLSI Circuits, Digest of Technical Papers
Volume	2020-June

Conference

Conference	2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020
Country/Territory	United States
City	Honolulu
Period	6/16/20 → 6/19/20

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Access to Document

10.1109/VLSICircuits18222.2020.9162826

Cite this

Ishida, K., Tanaka, M., Nagaoka, I., Ono, T., Kawakami, S., Tanimoto, T., Fujimaki, A., & Inoue, K. (2020). 32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic. In 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings [9162826] (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; Vol. 2020-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSICircuits18222.2020.9162826

32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic. / Ishida, Koki; Tanaka, Masamitsu; Nagaoka, Ikki et al.
2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2020. 9162826 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; Vol. 2020-June).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Ishida, K, Tanaka, M, Nagaoka, I, Ono, T , Kawakami, S , Tanimoto, T, Fujimaki, A & Inoue, K 2020, 32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic. in 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings., 9162826, IEEE Symposium on VLSI Circuits, Digest of Technical Papers, vol. 2020-June, Institute of Electrical and Electronics Engineers Inc., 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, United States, 6/16/20. https://doi.org/10.1109/VLSICircuits18222.2020.9162826

Ishida K, Tanaka M, Nagaoka I, Ono T , Kawakami S , Tanimoto T et al. 32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic. In 2020 IEEE Symposium on VLSI Circuits, VLSI Circuits 2020 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2020. 9162826. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers). doi: 10.1109/VLSICircuits18222.2020.9162826

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32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic

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