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Author

  • Inoue Koji
2013

SMYLEref: A reference architecture for manycore-processor SoCs

Kondo, M., Nguyen, S. T., Hirao, T., Soga, T., Sasaki, H. & Inoue, K., May 20 2013, 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013. p. 561-564 4 p. 6509656. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Static mapping of multiple data-parallel applications on embedded many-core SoCs

Kaida, J., Hara-Azumi, Y., Hieda, T., Taniguchi, I., Tomiyama, H. & Inoue, K., Oct 2013, In : IEICE Transactions on Information and Systems. E96-D, 10, p. 2268-2271 4 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)
2012

A three-dimensional integrated accelerator

Mehdipour, F., Nunna, K. C., Inoue, K. & Murakami, K. J., Dec 1 2012, Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012. p. 148-151 4 p. 6386885. (Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Improving performance and energy efficiency of embedded processors via post-fabrication instruction set customization

Noori, H., Mehdipour, F., Inoue, K. & Murakami, K., May 1 2012, In : Journal of Supercomputing. 60, 2, p. 196-222 27 p.

Research output: Contribution to journalArticle

6 Citations (Scopus)

Scalability-based manycore partitioning

Sasaki, H., Inoue, K., Tanimoto, T. & Nakamura, H., Oct 22 2012, In : Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT. p. 107-116 10 p.

Research output: Contribution to journalConference article

26 Citations (Scopus)

Task mapping techniques for embedded many-core SoCs

Kaida, J., Hieda, T., Taniguchi, I., Tomiyama, H., Hara-Azumi, Y. & Koji, I., 2012, ISOCC 2012 - 2012 International SoC Design Conference. p. 204-207 4 p. 6407075

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)
2011

3D implemented SRAM/DRAM hybrid cache architecture for high-performance and low power consumption

Inoue, K., Hashiguchi, S., Ueno, S., Fukumoto, N. & Murakami, K., Oct 13 2011, 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011. 6026484. (Midwest Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

A design scheme for a reconfigurable accelerator implemented by single-flux quantum circuits

Mehdipour, F., Honda, H., Inoue, K., Kataoka, H. & Murakami, K., Jan 1 2011, In : Journal of Systems Architecture. 57, 1, p. 169-179 11 p.

Research output: Contribution to journalArticle

6 Citations (Scopus)

A thermal-aware mapping algorithm for reducing peak temperature of an accelerator deployed in a 3D stack

Mehdipour, F., Nunna, K. C., Gauthier, L., Inoue, K. & Murakami, K., Dec 1 2011, 2011 IEEE International 3D Systems Integration Conference, 3DIC 2011. 6263034. (2011 IEEE International 3D Systems Integration Conference, 3DIC 2011).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Hardware and software requirements for implementing a high-performance superconductivity circuits-based accelerator

Mehdipour, F., Honda, H., Inoue, K. & Murakami, K., Dec 1 2011, Proceedings of the 3rd Asia Symposium on Quality Electronic Design, ASQED 2011. p. 229-235 7 p. 6111751. (Proceedings of the 3rd Asia Symposium on Quality Electronic Design, ASQED 2011).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Message from the chairs

Chang, N., Nakamura, H., Osada, K., Poncino, M. & Inoue, K., Sep 19 2011, In : Proceedings of the International Symposium on Low Power Electronics and Design. p. iii-iv 5993616.

Research output: Contribution to journalEditorial

NSIM: An interconnection network simulator for extreme-scale parallel computers

Miwa, H., Susukita, R., Shibamura, H., Hirao, T., Maki, J., Yoshida, M., Kando, T., Ajima, Y., Miyoshi, I., Shimizu, T., Oinaga, Y., Ando, H., Inadomi, Y., Inoue, K., Aoyagi, M. & Murakami, K., Dec 2011, In : IEICE Transactions on Information and Systems. E94-D, 12, p. 2298-2308 11 p.

Research output: Contribution to journalArticle

4 Citations (Scopus)

Performance evaluation of 3D stacked multi-core processors with temperature consideration

Hanada, T., Sasaki, H., Inoue, K. & Murakami, K., Dec 1 2011, 2011 IEEE International 3D Systems Integration Conference, 3DIC 2011. 6263025. (2011 IEEE International 3D Systems Integration Conference, 3DIC 2011).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Performance evaluations of finite difference applications realized on a single flux quantum circuits-based reconfigurable accelerator

Honda, H., Mehdipour, F., Kataoka, H., Koji, I. & Murakami, K. J., Dec 1 2011, p. 572-578. 7 p.

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Routing architecture and algorithms for a superconductivity circuits-based computing hardware

Mehdipour, F., Honda, H., Kataoka, H., Koji, I. & Murakami, K., Oct 17 2011, 2011 Canadian Conference on Electrical and Computer Engineering, CCECE 2011. p. 977-980 4 p. 6030605

Research output: Chapter in Book/Report/Conference proceedingConference contribution