Abstract
This paper presents the design of a CMOS low noise amplifier (LNA) with minimized group delay variations and optimized noise performance for ultra-wideband (UWB) applications. The proposed LNA employs a common source based current reuse topology. Through this configuration gain flatness of 12.25± 0.25 with noise figure (NF) less than 3.8 dB are achieved. This LNA achieves group delay variation of ±25 ps using the standard 0.18 μm CMOS technology. Weak Capacitive-Resistive shunt feedback technique is implemented across the input stage for wideband input matching. Series peaking with output resistive termination are adopted for group delay variations optimization. This UWB LNA has a measured 1dB compression point (P1dB) and an input third-order intermodulation point (IIP3) of-7.0 dBm and 2.5 dBm respectively at 5.5 GHz. The implemented UWB LNA chip area is only 560 μm × 590 μm.
Original language | English |
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Title of host publication | European Microwave Week 2014 |
Subtitle of host publication | "Connecting the Future", EuMW 2014 - Conference Proceedings; EuMIC 2014: 9th European Microwave Integrated Circuits Conference |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 448-451 |
Number of pages | 4 |
ISBN (Electronic) | 9782874870361 |
DOIs | |
Publication status | Published - Dec 23 2014 |
Event | 9th European Microwave Integrated Circuits Conference, EuMIC 2014 - Held as Part of the 17th European Microwave Week, EuMW 2014 - Rome, Italy Duration: Oct 6 2014 → Oct 7 2014 |
Publication series
Name | European Microwave Week 2014: "Connecting the Future", EuMW 2014 - Conference Proceedings; EuMIC 2014: 9th European Microwave Integrated Circuits Conference |
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Other
Other | 9th European Microwave Integrated Circuits Conference, EuMIC 2014 - Held as Part of the 17th European Microwave Week, EuMW 2014 |
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Country | Italy |
City | Rome |
Period | 10/6/14 → 10/7/14 |
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All Science Journal Classification (ASJC) codes
- Computer Networks and Communications
- Hardware and Architecture
- Electrical and Electronic Engineering
Cite this
A 0.18 μm CMOS current reuse ultra-wideband low noise amplifier (UWB-LNA) with minimized group delay variations. / Yousef, K.; Jia, H.; Pokharel, R.; Allam, A.; Ragab, M.; Kanaya, H.
European Microwave Week 2014: "Connecting the Future", EuMW 2014 - Conference Proceedings; EuMIC 2014: 9th European Microwave Integrated Circuits Conference. Institute of Electrical and Electronics Engineers Inc., 2014. p. 448-451 6997889 (European Microwave Week 2014: "Connecting the Future", EuMW 2014 - Conference Proceedings; EuMIC 2014: 9th European Microwave Integrated Circuits Conference).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - A 0.18 μm CMOS current reuse ultra-wideband low noise amplifier (UWB-LNA) with minimized group delay variations
AU - Yousef, K.
AU - Jia, H.
AU - Pokharel, R.
AU - Allam, A.
AU - Ragab, M.
AU - Kanaya, H.
PY - 2014/12/23
Y1 - 2014/12/23
N2 - This paper presents the design of a CMOS low noise amplifier (LNA) with minimized group delay variations and optimized noise performance for ultra-wideband (UWB) applications. The proposed LNA employs a common source based current reuse topology. Through this configuration gain flatness of 12.25± 0.25 with noise figure (NF) less than 3.8 dB are achieved. This LNA achieves group delay variation of ±25 ps using the standard 0.18 μm CMOS technology. Weak Capacitive-Resistive shunt feedback technique is implemented across the input stage for wideband input matching. Series peaking with output resistive termination are adopted for group delay variations optimization. This UWB LNA has a measured 1dB compression point (P1dB) and an input third-order intermodulation point (IIP3) of-7.0 dBm and 2.5 dBm respectively at 5.5 GHz. The implemented UWB LNA chip area is only 560 μm × 590 μm.
AB - This paper presents the design of a CMOS low noise amplifier (LNA) with minimized group delay variations and optimized noise performance for ultra-wideband (UWB) applications. The proposed LNA employs a common source based current reuse topology. Through this configuration gain flatness of 12.25± 0.25 with noise figure (NF) less than 3.8 dB are achieved. This LNA achieves group delay variation of ±25 ps using the standard 0.18 μm CMOS technology. Weak Capacitive-Resistive shunt feedback technique is implemented across the input stage for wideband input matching. Series peaking with output resistive termination are adopted for group delay variations optimization. This UWB LNA has a measured 1dB compression point (P1dB) and an input third-order intermodulation point (IIP3) of-7.0 dBm and 2.5 dBm respectively at 5.5 GHz. The implemented UWB LNA chip area is only 560 μm × 590 μm.
UR - http://www.scopus.com/inward/record.url?scp=84921304119&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84921304119&partnerID=8YFLogxK
U2 - 10.1109/EuMIC.2014.6997889
DO - 10.1109/EuMIC.2014.6997889
M3 - Conference contribution
AN - SCOPUS:84921304119
T3 - European Microwave Week 2014: "Connecting the Future", EuMW 2014 - Conference Proceedings; EuMIC 2014: 9th European Microwave Integrated Circuits Conference
SP - 448
EP - 451
BT - European Microwave Week 2014
PB - Institute of Electrical and Electronics Engineers Inc.
ER -