A 0.9-3.5 GHz high linearity, good efficiency CMOS broadband power amplifier using stagger tuning technique

Rohana Sapawi, Ramesh K. Pokharel, Dayang Azra Awang Mat, Haruchi Kanaya, Keiji Yoshida

Research output: Contribution to journalArticlepeer-review

3 Citations (Scopus)

Abstract

A simple CMOS broadband power amplifier design with high linearity and good efficiency is proposed.The proposed power amplifier design employed stagger tuning technique that consist of two stages amplifier with different resonant frequencies to obtain a wider bandwidth from 0.9 to 3.5 GHz and low power consumption. To obtain high linearity self-biased circuit is employed at the first stage of amplifier. The measurement results indicated that the proposed design achieves average gain of 8.5 dB, an input return loss (S 11) less than -3 dB and output return loss (S 22) less than -5 dB. High linearity, that is, IIP3 of 13.4 dBm at 2 GHz, power added efficiency of 34% is obtained while consuming 24.4 mW power from 1.5 V supply voltage.

Original languageEnglish
Pages (from-to)2881-2884
Number of pages4
JournalMicrowave and Optical Technology Letters
Volume54
Issue number12
DOIs
Publication statusPublished - Dec 1 2012

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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