A 10Gbps/channel on-chip signaling circuit with an impedance-unmatched CML driver in 90nm CMOS technology

Takeshi Kuboki, Akira Tsuchiya, Hidetoshi Onodera

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

An on-chip signaling system consists of a CML driver, a differential transmission-line and a CML receiver is fabricated. We developed an impedance-unmatched driver for power reduction. The impedance-unmatched driver reduces the tail current of the CML buffer by tuning the load resistance. The designed circuit achieves 3mm, 10Gbps/channel on-chip signal transmission and the impedance-unmatched driver saves the energy per bit by 21% compared with a conventional impedance-matched driver.

Original languageEnglish
Title of host publicationProceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007
Pages120-121
Number of pages2
DOIs
Publication statusPublished - Dec 1 2007
Externally publishedYes
EventASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007 - Yokohama, Japan
Duration: Jan 23 2007Jan 27 2007

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

OtherASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007
CountryJapan
CityYokohama
Period1/23/071/27/07

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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    Kuboki, T., Tsuchiya, A., & Onodera, H. (2007). A 10Gbps/channel on-chip signaling circuit with an impedance-unmatched CML driver in 90nm CMOS technology. In Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007 (pp. 120-121). [4196016] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2007.357970