A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13μm CMOS

Masafumi Nogawa, Yusuke Ohtomo, Shunji Kimura, Kazuyoshi Nishimura, Tomoaki Kawamura, Minoru Togashi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

A 10Gb/s burst-mode limiting amplifier is developed in a 0.13μm CMOS process. An adaptive gain-selection technique achieves a settling time of 0.8ns and a wide input dynamic range of 28dB, which is five-times wider than that of previous work at 10Gb/s.

Original languageEnglish
Title of host publication2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers
Pages248+231
Publication statusPublished - Dec 1 2006
Externally publishedYes
Event2006 IEEE International Solid-State Circuits Conference, ISSCC - San Francisco, CA, United States
Duration: Feb 6 2006Feb 9 2006

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
ISSN (Print)0193-6530

Other

Other2006 IEEE International Solid-State Circuits Conference, ISSCC
CountryUnited States
CitySan Francisco, CA
Period2/6/062/9/06

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Nogawa, M., Ohtomo, Y., Kimura, S., Nishimura, K., Kawamura, T., & Togashi, M. (2006). A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13μm CMOS. In 2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers (pp. 248+231). [1696135] (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13μm CMOS. / Nogawa, Masafumi; Ohtomo, Yusuke; Kimura, Shunji; Nishimura, Kazuyoshi; Kawamura, Tomoaki; Togashi, Minoru.

2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. 2006. p. 248+231 1696135 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Nogawa, M, Ohtomo, Y, Kimura, S, Nishimura, K, Kawamura, T & Togashi, M 2006, A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13μm CMOS. in 2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers., 1696135, Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp. 248+231, 2006 IEEE International Solid-State Circuits Conference, ISSCC, San Francisco, CA, United States, 2/6/06.
Nogawa M, Ohtomo Y, Kimura S, Nishimura K, Kawamura T, Togashi M. A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13μm CMOS. In 2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. 2006. p. 248+231. 1696135. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).
Nogawa, Masafumi ; Ohtomo, Yusuke ; Kimura, Shunji ; Nishimura, Kazuyoshi ; Kawamura, Tomoaki ; Togashi, Minoru. / A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13μm CMOS. 2006 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. 2006. pp. 248+231 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).
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