A 1.2V 246μW CMOS latched comparator with neutralization technique for reducing Kickback Noise

Ghazal A. Fahmy; R. K. Pokharel; H. Kanaya; K. Yoshida

doi:10.1109/TENCON.2010.5686392

A 1.2V 246μW CMOS latched comparator with neutralization technique for reducing Kickback Noise

Ghazal A. Fahmy, R. K. Pokharel, H. Kanaya, K. Yoshida

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

9 Citations (Scopus)

Abstract

A low power CMOS latched comparator has been designed in TSMC 0.18um employ neutralization technique for reducing Kickback Noise. The simulation results demonstrate that it can work at 1GHz suitable for high speed applications. Measurement results prove that the latched comparator consumes 246μW with a power supply of 1.2v at 10MHz. A simulation method for accurately determining dynamic offset in latched comparator is presented.

Original language	English
Title of host publication	TENCON 2010 - 2010 IEEE Region 10 Conference
Pages	1162-1165
Number of pages	4
DOIs	https://doi.org/10.1109/TENCON.2010.5686392
Publication status	Published - Dec 1 2010
Event	2010 IEEE Region 10 Conference, TENCON 2010 - Fukuoka, Japan Duration: Nov 21 2010 → Nov 24 2010

Publication series

Name	IEEE Region 10 Annual International Conference, Proceedings/TENCON

Other

Other	2010 IEEE Region 10 Conference, TENCON 2010
Country	Japan
City	Fukuoka
Period	11/21/10 → 11/24/10

All Science Journal Classification (ASJC) codes

Computer Science Applications
Electrical and Electronic Engineering

Cite this

Fahmy, G. A., Pokharel, R. K., Kanaya, H., & Yoshida, K. (2010). A 1.2V 246μW CMOS latched comparator with neutralization technique for reducing Kickback Noise. In TENCON 2010 - 2010 IEEE Region 10 Conference (pp. 1162-1165). [5686392] (IEEE Region 10 Annual International Conference, Proceedings/TENCON). https://doi.org/10.1109/TENCON.2010.5686392

A 1.2V 246μW CMOS latched comparator with neutralization technique for reducing Kickback Noise. / Fahmy, Ghazal A.; Pokharel, R. K.; Kanaya, H.; Yoshida, K.

TENCON 2010 - 2010 IEEE Region 10 Conference. 2010. p. 1162-1165 5686392 (IEEE Region 10 Annual International Conference, Proceedings/TENCON).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Fahmy, GA, Pokharel, RK , Kanaya, H & Yoshida, K 2010, A 1.2V 246μW CMOS latched comparator with neutralization technique for reducing Kickback Noise. in TENCON 2010 - 2010 IEEE Region 10 Conference., 5686392, IEEE Region 10 Annual International Conference, Proceedings/TENCON, pp. 1162-1165, 2010 IEEE Region 10 Conference, TENCON 2010, Fukuoka, Japan, 11/21/10. https://doi.org/10.1109/TENCON.2010.5686392

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Access to Document

10.1109/TENCON.2010.5686392