A 25-Gb/s LD driver with area-effective inductor in a 0.18-μm CMOS

Takeshi Kuboki, Yusuke Ohtomo, Akira Tsuchiya, Keiji Kishine, Hidetoshi Onodera

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper presents high-speed and area-efficient laser-diode driver with interwoven inductor in a 0.18-μm CMOS. We interweave ten peaking inductors for area-effective implementation as well as performance enhancement. Interwoven inductor can not only achieve area-efficiency but also tune frequency characteristic. Mutual inductances of interwoven inductor enhance bandwidth and suppress group delay dispersion. The test chip area is 0.32 mm2 and the maximum operating speed is 25 Gb/s.

Original languageEnglish
Title of host publication2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013
Pages105-106
Number of pages2
DOIs
Publication statusPublished - May 20 2013
Externally publishedYes
Event2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 - Yokohama, Japan
Duration: Jan 22 2013Jan 25 2013

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

Other2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013
CountryJapan
CityYokohama
Period1/22/131/25/13

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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  • Cite this

    Kuboki, T., Ohtomo, Y., Tsuchiya, A., Kishine, K., & Onodera, H. (2013). A 25-Gb/s LD driver with area-effective inductor in a 0.18-μm CMOS. In 2013 18th Asia and South Pacific Design Automation Conference, ASP-DAC 2013 (pp. 105-106). [6509578] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2013.6509578