The design of a 3.0-7.5 GHz UWB CMOS power amplifier (PA) for group 1∼3 MB-OFDM UWB applications in TSMC 0.18-μm CMOS technology is presented. The UWB PA proposed in this paper uses a current-reused technique to enhance the gain at the upper end of the desired band, and the resistive feedback at the second stage is used to obtain gain flatness. The shunt-shunt feedback is used to enhance bandwidth and improve output wideband matching. In addition, the cascode topology with an additional common-source stage was used to achieve high power gain. The post-layout simulation results indicated that the input return loss (S11) was less than -5 dB, output return loss (S22) was less than -7 dBm, and average gain was approximately 10 dB over the frequencies ranges of interest. The output 1-dB compression point above 0 dBm, the output third-order intercept point (OIP3) was 10 dBm, and average PAE of 12%. Moreover, an excellent phase linearity property (group delay) of ±137.7 ps across the whole band was obtained with a power consumption of 15 mW.