TY - GEN
T1 - A 5-9 GHz CMOS Ultra-wideband power amplifier design using load-pull
AU - Mosalam, H.
AU - Allam, A.
AU - Jia, H.
AU - Pokharel, R.
AU - Ragab, M.
AU - Yoshida, K.
PY - 2013/1/1
Y1 - 2013/1/1
N2 - The design of 5-9 GHz, two stages CMOS power amplifier (PA) for Ultra-wideband (UWB) is presented in this paper. Post-layout simulation results indicated a power gain S21 of 16± 0.5dB, an input return loss S11 less than -4 dB and an output return loss S22 less than -5 dB over the frequency range of interest. Source-pull contours were used to design the inter stage matching of the PA. The proposed two stages PA achieves an average Power Added Efficiency (PAE) of 12.4% and an output 1-dB compression above 0 dBm over the same frequency band. Moreover, the proposed UWB PA achieves group delay of 170±20 ps with power consumption of 25 mW from a 1.8V supply voltage. The UWB PA is designed in TSMC 0.18 μm CMOS technology.
AB - The design of 5-9 GHz, two stages CMOS power amplifier (PA) for Ultra-wideband (UWB) is presented in this paper. Post-layout simulation results indicated a power gain S21 of 16± 0.5dB, an input return loss S11 less than -4 dB and an output return loss S22 less than -5 dB over the frequency range of interest. Source-pull contours were used to design the inter stage matching of the PA. The proposed two stages PA achieves an average Power Added Efficiency (PAE) of 12.4% and an output 1-dB compression above 0 dBm over the same frequency band. Moreover, the proposed UWB PA achieves group delay of 170±20 ps with power consumption of 25 mW from a 1.8V supply voltage. The UWB PA is designed in TSMC 0.18 μm CMOS technology.
UR - http://www.scopus.com/inward/record.url?scp=84901462285&partnerID=8YFLogxK
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U2 - 10.1109/ICECS.2013.6815333
DO - 10.1109/ICECS.2013.6815333
M3 - Conference contribution
AN - SCOPUS:84901462285
SN - 9781479924523
T3 - Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems
SP - 13
EP - 16
BT - 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems, ICECS 2013
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems, ICECS 2013
Y2 - 8 December 2013 through 11 December 2013
ER -