A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers

Yuki Yamashita, Daisuke Kanemoto, Haruichi Kanaya, Ramesh Pokharel, Keiji Yoshida

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

This paper describes the design of 5-GHz fully integrated CMOS class-E single-ended power amplifier (PA) for wireless transmitter applications in a 0.18-μm CMOS technology. The proposed class-E PA employs the cascode topology with a self-biasing technique to reduce device stress. Three cascaded class-D driver amplifiers are used to actualize the sharp switching at the class-E power stage. All device components are integrated on chip and the chip area is 1.0×1.3 mm2. The measurement results indicate that the PA delivers 16.4 dBm output power and 35.4 % power-added efficiency with 2.3 V power supply voltage into a 50 Ω load.

Original languageEnglish
Title of host publicationProceedings of the 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012
Pages237-239
Number of pages3
DOIs
Publication statusPublished - 2012
Event2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012 - Singapore, Singapore
Duration: Nov 21 2012Nov 23 2012

Other

Other2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012
CountrySingapore
CitySingapore
Period11/21/1211/23/12

Fingerprint

Power amplifiers
Transmitters
Topology
Electric potential

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications

Cite this

Yamashita, Y., Kanemoto, D., Kanaya, H., Pokharel, R., & Yoshida, K. (2012). A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers. In Proceedings of the 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012 (pp. 237-239). [6401672] https://doi.org/10.1109/RFIT.2012.6401672

A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers. / Yamashita, Yuki; Kanemoto, Daisuke; Kanaya, Haruichi; Pokharel, Ramesh; Yoshida, Keiji.

Proceedings of the 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012. 2012. p. 237-239 6401672.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Yamashita, Y, Kanemoto, D, Kanaya, H, Pokharel, R & Yoshida, K 2012, A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers. in Proceedings of the 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012., 6401672, pp. 237-239, 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012, Singapore, Singapore, 11/21/12. https://doi.org/10.1109/RFIT.2012.6401672
Yamashita Y, Kanemoto D, Kanaya H, Pokharel R, Yoshida K. A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers. In Proceedings of the 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012. 2012. p. 237-239. 6401672 https://doi.org/10.1109/RFIT.2012.6401672
Yamashita, Yuki ; Kanemoto, Daisuke ; Kanaya, Haruichi ; Pokharel, Ramesh ; Yoshida, Keiji. / A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers. Proceedings of the 2012 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2012. 2012. pp. 237-239
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