This paper introduces the analysis and optimization of capacitive power transfer system with a CL compensation circuit on the secondary for reduced voltage stress across the electric field coupling interface and less system sensitivity. The system has been mathematically analyzed to understand the effect of the CL circuit. And simulation and experimental studies are also carried out for verifications. It is found by increasing Cp (and reducing Lp accordingly to be tuned to the nominal frequency), the quality factor (Q) can be reduced to make the system less sensitive to circuit parameter and load variations, thus easier to tune. However, the CL network should be carefully designed to reduce the voltage stress and electric field leakage around the interface. A practical circuit is built which has demonstrated 5 W of power transfer across a combined interface capacitance of ∼ 1 nF at an operating frequency of 1 MHz, and the system power efficiency is above 65%. The voltage stress and sensitivity reduction have been confirmed practically.