A character size optimization technique for throughput enhancement of character projection lithography

Makoto Sugihara, Taiga Takata, Kenta Nakamura, Ryoichi Inanami, Hiroaki Hayashi, Katsumi Kishimoto, Tetsuya Hasebe, Yukihiro Kawano, Yusuke Matsunaga, Kazuaki Murakam, Katsuya Okumura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

We propose a character size optimization technique to enhance the throughput of maskless lithography as well as photomask manufacture. The number of electron beam shots to draw the patterns of circuits is a dominant factor in the manufacture time and the cost for devices. Our technique is capable of drastically reducing them by optimizing the size of characters, which are the patterns to project and are placed on CP masks. Experimental results show that our technique reduced 72.0% of EB shots in the best case, comparing with the ad hoc character sizing.

Original languageEnglish
Title of host publicationISCAS 2006
Subtitle of host publication2006 IEEE International Symposium on Circuits and Systems, Proceedings
Pages2561-2564
Number of pages4
Publication statusPublished - Dec 1 2006
EventISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems - Kos, Greece
Duration: May 21 2006May 24 2006

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Other

OtherISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems
CountryGreece
CityKos
Period5/21/065/24/06

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'A character size optimization technique for throughput enhancement of character projection lithography'. Together they form a unique fingerprint.

  • Cite this

    Sugihara, M., Takata, T., Nakamura, K., Inanami, R., Hayashi, H., Kishimoto, K., Hasebe, T., Kawano, Y., Matsunaga, Y., Murakam, K., & Okumura, K. (2006). A character size optimization technique for throughput enhancement of character projection lithography. In ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings (pp. 2561-2564). [1693146] (Proceedings - IEEE International Symposium on Circuits and Systems).