A design for a low-power digital matched filter applicable to W-CDMA

S. Goto, T. Yamada, N. Takayama, Hiroto Yasuura, Yoshifurni Matsushita, Yasoo Harada

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

This paper presents a design for a low-power digital matched filter (DMF) applicable to Wideband-Code Division Multiple Access (W-CDMA), which is a Direct-Sequence Spread-Spectrum (DS-SS) communication system. The proposed architectural approach to reducing the power consumption focuses on the reception registers and the correlation-calculating unit (CCU), which dissipate the majority of the power in a DMF The main features are asynchronous latch clock generation for the reception registers, parallelism of the correlation calculation operations and bit manipulation for chip-correlation operations. A DMF is designed in compliance with the W-CDMA specifications incorporating the proposed techniques, and its properties are evaluated by computer simulations at the gate level using 0.18-μm CMOS standard cell array technology. The results of the simulations show a power consumption of 9.3 mW (@15.6MHz, 1.6V), which is only about 30% of the power consumption of conventional DMFs.

Original languageEnglish
Title of host publicationProceedings - Euromicro Symposium on Digital System Design
Subtitle of host publicationArchitectures, Methods and Tools, DSD 2002
EditorsMartyn Edwards
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages210-217
Number of pages8
ISBN (Electronic)0769517900, 9780769517902
DOIs
Publication statusPublished - Jan 1 2002
EventEuromicro Symposium on Digital System Design, DSD 2002 - Dortmund, Germany
Duration: Sep 4 2002Sep 6 2002

Publication series

NameProceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002

Other

OtherEuromicro Symposium on Digital System Design, DSD 2002
CountryGermany
CityDortmund
Period9/4/029/6/02

Fingerprint

Matched filters
Digital filters
Code division multiple access
Electric power utilization
Flip flop circuits
Clocks
Communication systems
Specifications
Computer simulation

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Hardware and Architecture

Cite this

Goto, S., Yamada, T., Takayama, N., Yasuura, H., Matsushita, Y., & Harada, Y. (2002). A design for a low-power digital matched filter applicable to W-CDMA. In M. Edwards (Ed.), Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002 (pp. 210-217). [1115371] (Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/DSD.2002.1115371

A design for a low-power digital matched filter applicable to W-CDMA. / Goto, S.; Yamada, T.; Takayama, N.; Yasuura, Hiroto; Matsushita, Yoshifurni; Harada, Yasoo.

Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002. ed. / Martyn Edwards. Institute of Electrical and Electronics Engineers Inc., 2002. p. 210-217 1115371 (Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Goto, S, Yamada, T, Takayama, N, Yasuura, H, Matsushita, Y & Harada, Y 2002, A design for a low-power digital matched filter applicable to W-CDMA. in M Edwards (ed.), Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002., 1115371, Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002, Institute of Electrical and Electronics Engineers Inc., pp. 210-217, Euromicro Symposium on Digital System Design, DSD 2002, Dortmund, Germany, 9/4/02. https://doi.org/10.1109/DSD.2002.1115371
Goto S, Yamada T, Takayama N, Yasuura H, Matsushita Y, Harada Y. A design for a low-power digital matched filter applicable to W-CDMA. In Edwards M, editor, Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002. Institute of Electrical and Electronics Engineers Inc. 2002. p. 210-217. 1115371. (Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002). https://doi.org/10.1109/DSD.2002.1115371
Goto, S. ; Yamada, T. ; Takayama, N. ; Yasuura, Hiroto ; Matsushita, Yoshifurni ; Harada, Yasoo. / A design for a low-power digital matched filter applicable to W-CDMA. Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002. editor / Martyn Edwards. Institute of Electrical and Electronics Engineers Inc., 2002. pp. 210-217 (Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002).
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