TY - GEN
T1 - A design technique for a high-speed SAR ADC using non-binary search algorithm and redundancy
AU - Okazaki, Toru
AU - Kanemoto, Daisuke
AU - Pokharel, Ramesh
AU - Yoshida, Keiji
AU - Kanaya, Haruichi
PY - 2013/12/1
Y1 - 2013/12/1
N2 - This paper presents a design technique of minimizing time for each bit decision and adding appropriate redundancy bits. The technique helps the design of a SAR ADC. We show that the conversion time of proposed SAR ADCs can get faster than that of conventional ones by using the technique.
AB - This paper presents a design technique of minimizing time for each bit decision and adding appropriate redundancy bits. The technique helps the design of a SAR ADC. We show that the conversion time of proposed SAR ADCs can get faster than that of conventional ones by using the technique.
UR - http://www.scopus.com/inward/record.url?scp=84893351145&partnerID=8YFLogxK
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U2 - 10.1109/APMC.2013.6694846
DO - 10.1109/APMC.2013.6694846
M3 - Conference contribution
AN - SCOPUS:84893351145
SN - 9781479914746
T3 - Asia-Pacific Microwave Conference Proceedings, APMC
SP - 506
EP - 508
BT - 2013 Asia-Pacific Microwave Conference Proceedings, APMC 2013
T2 - 2013 3rd Asia-Pacific Microwave Conference, APMC 2013
Y2 - 5 November 2013 through 8 November 2013
ER -