A fast test pattern generation for large scale circuits

Yusuke Matsunaga, Masahiro Fujita

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

This paper describes a fast test pattern generator for large combinational circuit refining existing algorithms, the system can detect testable faults and identify redundant faults more effectively and mor efficiently. Three major contributions are presented in the paper, which are a fast growing algorithm finding path controllers, circuit narrowing technique and global implication based on equivalence. These modifications are described in detail and experimental results using ISCAS benchmark circuits are shown.

Original languageEnglish
Pages (from-to)305-311
Number of pages7
JournalFujitsu Scientific and Technical Journal
Volume29
Issue number3
Publication statusPublished - Sep 1993
Externally publishedYes

Fingerprint

Combinatorial circuits
Networks (circuits)
Refining
Controllers

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

A fast test pattern generation for large scale circuits. / Matsunaga, Yusuke; Fujita, Masahiro.

In: Fujitsu Scientific and Technical Journal, Vol. 29, No. 3, 09.1993, p. 305-311.

Research output: Contribution to journalArticle

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