Abstract
Reconfiguration latency has a significant impact on the system performance in reconfigurable systems. A temporal partitioning approach is introduced for partitioning data flow graphs for a reconfigurable system comprising a partial programmable fine-grained hardware. Residing eligibility inspired from the Universal gravitation law is introduced to depict the eligibility of a node to stay in succeeding configurations (partitions) and to prohibit it from being swapped in/out. Partitioning based on residing eligibility causes fewer nodes with different functionalities to be assigned to subsequent partitions. Thus, reconfiguration overhead time and also unused hardware space decreases due to common parts in consecutive configurations.
Original language | English |
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Pages (from-to) | 366-373 |
Number of pages | 8 |
Journal | IEICE Electronics Express |
Volume | 5 |
Issue number | 10 |
DOIs | |
Publication status | Published - May 25 2008 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering