This paper proposes a history-based tag-comparison scheme for reducing energy consumption of direct-mapped instruction caches. The proposed cache efficiently exploits program-execution footprints recorded in the Branch Target Buffer (BTB), and attempts to detect and eliminate unnecessary tag checks at run time. Simulation results show that our approach can eliminate up to 95% of tag checks, saving the cache energy by 17%, while affecting the processor performance by only 0.2%.
|Number of pages||6|
|Publication status||Published - 2002|
|Event||Proceedings of the 2002 International Symposium on Low Power Electronics and Design - Monterey, CA, United States|
Duration: Aug 12 2002 → Aug 14 2002
|Other||Proceedings of the 2002 International Symposium on Low Power Electronics and Design|
|Period||8/12/02 → 8/14/02|
All Science Journal Classification (ASJC) codes