Abstract
In this paper, a low flicker noise, 5 GHz Direct Conversion Receiver (DRC) has been designed utilizing Dynamic Current Injection (DCI) and tuning inductor in the mixing stage. This DRC has been designed in a TSMC 0.18 μm 1P6M CMOS process for WLAN 802.11a applications. The proposed DRC achieves 7.4 dB SSB-NF, 28 dB Conversion Gain (CG), -10 dBm IIP3, and 1/f noise corner frequency of 100KHz with 80mW power consumption from 1.8V supply voltage. The active chip area was 1.9mm2. All the simulations has been performed by Cadence Spectre® simulator.
| Original language | English |
|---|---|
| Title of host publication | APMC 2009 - Asia Pacific Microwave Conference 2009 |
| Pages | 1647-1650 |
| Number of pages | 4 |
| DOIs | |
| Publication status | Published - Dec 1 2009 |
| Event | Asia Pacific Microwave Conference 2009, APMC 2009 - Singapore, Singapore Duration: Dec 7 2009 → Dec 10 2009 |
Publication series
| Name | APMC 2009 - Asia Pacific Microwave Conference 2009 |
|---|
Other
| Other | Asia Pacific Microwave Conference 2009, APMC 2009 |
|---|---|
| Country | Singapore |
| City | Singapore |
| Period | 12/7/09 → 12/10/09 |
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All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering
Cite this
A low flicker noise direct conversion receiver for the IEEE 802.11a wireless LAN standard. / Abdelghany, M. A.; Galal, A. I.A.; Pokharel, R. K.; Kanaya, H.; KYoshida.
APMC 2009 - Asia Pacific Microwave Conference 2009. 2009. p. 1647-1650 5384336 (APMC 2009 - Asia Pacific Microwave Conference 2009).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - A low flicker noise direct conversion receiver for the IEEE 802.11a wireless LAN standard
AU - Abdelghany, M. A.
AU - Galal, A. I.A.
AU - Pokharel, R. K.
AU - Kanaya, H.
AU - KYoshida,
PY - 2009/12/1
Y1 - 2009/12/1
N2 - In this paper, a low flicker noise, 5 GHz Direct Conversion Receiver (DRC) has been designed utilizing Dynamic Current Injection (DCI) and tuning inductor in the mixing stage. This DRC has been designed in a TSMC 0.18 μm 1P6M CMOS process for WLAN 802.11a applications. The proposed DRC achieves 7.4 dB SSB-NF, 28 dB Conversion Gain (CG), -10 dBm IIP3, and 1/f noise corner frequency of 100KHz with 80mW power consumption from 1.8V supply voltage. The active chip area was 1.9mm2. All the simulations has been performed by Cadence Spectre® simulator.
AB - In this paper, a low flicker noise, 5 GHz Direct Conversion Receiver (DRC) has been designed utilizing Dynamic Current Injection (DCI) and tuning inductor in the mixing stage. This DRC has been designed in a TSMC 0.18 μm 1P6M CMOS process for WLAN 802.11a applications. The proposed DRC achieves 7.4 dB SSB-NF, 28 dB Conversion Gain (CG), -10 dBm IIP3, and 1/f noise corner frequency of 100KHz with 80mW power consumption from 1.8V supply voltage. The active chip area was 1.9mm2. All the simulations has been performed by Cadence Spectre® simulator.
UR - http://www.scopus.com/inward/record.url?scp=77950640113&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77950640113&partnerID=8YFLogxK
U2 - 10.1109/APMC.2009.5384336
DO - 10.1109/APMC.2009.5384336
M3 - Conference contribution
AN - SCOPUS:77950640113
SN - 9781424428021
T3 - APMC 2009 - Asia Pacific Microwave Conference 2009
SP - 1647
EP - 1650
BT - APMC 2009 - Asia Pacific Microwave Conference 2009
ER -