A low-temperature fabricated gate-stack structure for Ge-based MOSFET with ferromagnetic epitaxial Heusler-alloy/Ge electrodes

Yuichi Fujita, Michihiro Yamada, Yuta Nagatomi, Keisuke Yamamoto, Shinya Yamada, Kentarou Sawano, Takeshi Kanashima, Hiroshi Nakashima, Kohei Hamaya

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    2 Citations (Scopus)

    Abstract

    A possible low-temperature fabrication process of a gate-stack for Ge-based spin metal-oxide-semiconductor field-effect transistor (MOSFET) is investigated. First, since we use epitaxial ferromagnetic Heusler alloys on top of the phosphorous doped Ge epilayer as spin injector and detector, we need a dry etching process to form Heusler-alloy/n+-Ge Schottky-tunnel contacts. Next, to remove the Ge epilayers damaged by the dry etching process, the fabricated structures are dipped in a 0.03% diluted H2O2 solution. Finally, Al/SiO2/GeO2/Ge gate-stack structures are fabricated at 300 °C as a top gate-stack structure. As a result, the currents in the Ge-MOSFET fabricated here can be modulated by applying gate voltages even by using the low-temperature formed gate-stack structures. This low-temperature fabrication process can be utilized for operating Ge spin MOSFETs with a top gate electrode.

    Original languageEnglish
    Article number63001
    JournalJapanese journal of applied physics
    Volume55
    Issue number6
    DOIs
    Publication statusPublished - Jun 2016

    All Science Journal Classification (ASJC) codes

    • Engineering(all)
    • Physics and Astronomy(all)

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