A novel low on-resistance Schottky-barrier diode with p-buried floating layer structure

Wataru Saito, Ichiro Omura, Ken'ichi Tokano, Tsuneo Ogura, Hiromichi Ohashi

Research output: Contribution to journalArticle

22 Citations (Scopus)

Abstract

A novel low on-resistance Schottky-barrier diode (SBD) structure with a p-buried floating layer is demonstrated by fabricating 300-V SBDs using a buried epitaxial growth technique. The fabricated SBDs realize a 50% reduction of chip area and show a possibility of higher breakdown voltage SBD of over 100 V. In addition, both the low on-resistance and the soft-recovery characteristics can be realized by the p-buried floating layer structure. The demonstrated structure is very attractive for reduction of power dissipation without electromagnetic interference noise increase.

Original languageEnglish
Pages (from-to)797-802
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume51
Issue number5
DOIs
Publication statusPublished - May 1 2004
Externally publishedYes

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'A novel low on-resistance Schottky-barrier diode with p-buried floating layer structure'. Together they form a unique fingerprint.

  • Cite this