A Plasma Enhanced CVD Technology for Solving Issues on Sidewall Deposition in Trenches and Holes

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

EUV lithography drives the miniaturization of semiconductors for higher integration, and semiconductor manufacturing is in transition from two-dimensional (2D) to three-dimensional (3D) structures [1], which plays a crucial role in supporting packaging for edge computing such as Internet-of-Things (loT). 3D power scaling enables higher integration without reducing the size of transistors by arranging them vertically instead of horizontally. One of the important processes in manufacturing 3D structured semiconductors is the formation of films on sidewalls of trenches and holes. Such films are often deposited by plasma enhanced chemical vapor deposition (PECVD) [2]. Due to the gas decomposition by plasma, PECVD method archives a high deposition rate of good quality films at low temperature, which is an advantage over other deposition methods such as atomic layer deposition (ALD) [3]. However, this does not fully meet the actual manufacturing requirements. For instance, SiO2 dielectric films deposited by PECVD usually have low coverage and poor film quality on sidewall of trenches and holes compared to films on surface. Ion impact is one of the most important factors contributing to improving step coverage and film quality in trenches and holes. One parameter that characterized ion impact is the ion energy distribution function (IEDF) and ion angular distribution (IADF) [4], [5]. There are strong needs for low temperature deposition in trenches and holes.

Original languageEnglish
Title of host publicationProceedings - 2022 17th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2022
PublisherIEEE Computer Society
ISBN (Electronic)9781665452212
DOIs
Publication statusPublished - 2022
Event17th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2022 - Taipei, Taiwan, Province of China
Duration: Oct 26 2022Oct 28 2022

Publication series

NameProceedings of Technical Papers - International Microsystems, Packaging, Assembly, and Circuits Technology Conference, IMPACT
Volume2022-October
ISSN (Print)2150-5934
ISSN (Electronic)2150-5942

Conference

Conference17th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2022
Country/TerritoryTaiwan, Province of China
CityTaipei
Period10/26/2210/28/22

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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