A power reduction scheme for data buses by dynamic detection of active bits

M. Muroyama, A. Hyodo, T. Okuma, Hiroto Yasuura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

To transfer a small number, we inherently need the small number of bits. But all bit lines on a data bus change their status and redundant power is consumed. To reduce the redundant power consumption, we introduce a concept named active bits. In this paper, we propose a power reduction scheme for data buses using the active bits. Suppressing switching activity of inactive bits, we can reduce redundant power consumption. We propose various power reduction techniques using active bits and the implementation methods. Experimental results illustrate 20[%] - 35[%] on average and up to 54.2[%] switching activity reduction.

Original languageEnglish
Title of host publicationProceedings - Euromicro Symposium on Digital System Design, DSD 2003
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages408-415
Number of pages8
ISBN (Electronic)0769520030, 9780769520032
DOIs
Publication statusPublished - Jan 1 2003
EventEuromicro Symposium on Digital System Design, DSD 2003 - Belek-Antalya, Turkey
Duration: Sep 1 2003Sep 6 2003

Publication series

NameProceedings - Euromicro Symposium on Digital System Design, DSD 2003

Other

OtherEuromicro Symposium on Digital System Design, DSD 2003
CountryTurkey
CityBelek-Antalya
Period9/1/039/6/03

Fingerprint

Electric power utilization

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Muroyama, M., Hyodo, A., Okuma, T., & Yasuura, H. (2003). A power reduction scheme for data buses by dynamic detection of active bits. In Proceedings - Euromicro Symposium on Digital System Design, DSD 2003 (pp. 408-415). (Proceedings - Euromicro Symposium on Digital System Design, DSD 2003). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/DSD.2003.1231974

A power reduction scheme for data buses by dynamic detection of active bits. / Muroyama, M.; Hyodo, A.; Okuma, T.; Yasuura, Hiroto.

Proceedings - Euromicro Symposium on Digital System Design, DSD 2003. Institute of Electrical and Electronics Engineers Inc., 2003. p. 408-415 (Proceedings - Euromicro Symposium on Digital System Design, DSD 2003).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Muroyama, M, Hyodo, A, Okuma, T & Yasuura, H 2003, A power reduction scheme for data buses by dynamic detection of active bits. in Proceedings - Euromicro Symposium on Digital System Design, DSD 2003. Proceedings - Euromicro Symposium on Digital System Design, DSD 2003, Institute of Electrical and Electronics Engineers Inc., pp. 408-415, Euromicro Symposium on Digital System Design, DSD 2003, Belek-Antalya, Turkey, 9/1/03. https://doi.org/10.1109/DSD.2003.1231974
Muroyama M, Hyodo A, Okuma T, Yasuura H. A power reduction scheme for data buses by dynamic detection of active bits. In Proceedings - Euromicro Symposium on Digital System Design, DSD 2003. Institute of Electrical and Electronics Engineers Inc. 2003. p. 408-415. (Proceedings - Euromicro Symposium on Digital System Design, DSD 2003). https://doi.org/10.1109/DSD.2003.1231974
Muroyama, M. ; Hyodo, A. ; Okuma, T. ; Yasuura, Hiroto. / A power reduction scheme for data buses by dynamic detection of active bits. Proceedings - Euromicro Symposium on Digital System Design, DSD 2003. Institute of Electrical and Electronics Engineers Inc., 2003. pp. 408-415 (Proceedings - Euromicro Symposium on Digital System Design, DSD 2003).
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