A prototype system for many-core architecture SMYLEref with FPGA evaluation boards

Son Truong Nguyen, Masaaki Kondo, Tomoya Hirao, Koji Inoue

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1 Citation (Scopus)

Abstract

Nowadays, the trend of developing micro-processor with hundreds of cores brings a promising prospect for embedded systems. Realizing a high performance and low power many-core processor is becoming a primary technical challenge. Generally, three major issues required to be resolved includes: 1) realizing efficient massively parallel processing, 2) reducing dynamic power consumption, and 3) improving software productivity. To deal with these issues, we propose a solution to use many lowperformance but small and very low-power cores to obtain very high performance, and develop a referential many-core architecture and a program development environment. This paper introduces a many-core architecture named SMYLEref and its prototype system with off-the-shelf FPGA evaluation boards. The initial evaluation results of several SPLASH2 benchmark programs conducted on our developed 128-core platform are also presented and discussed in this paper.

Original languageEnglish
Pages (from-to)1645-1653
Number of pages9
JournalIEICE Transactions on Information and Systems
VolumeE96-D
Issue number8
DOIs
Publication statusPublished - Jan 1 2013

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All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Computer Vision and Pattern Recognition
  • Electrical and Electronic Engineering
  • Artificial Intelligence

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