A SIMD parallelization method for an application for LSI logic simulation

Natsuki Kai, Ryoji Nishinohara, Hiroshi Koide

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

This paper proposes and evaluates a SIMD parallelization method for an application for LSI logic simulation. The proposal method converts a net list into a parallel and distributed program code so as to make the code SIMD parallelized. As experiments to evaluate our proposal method, tasks in SIMD arithmetic logical units on Cell/B.E., and we measure that elapsed time. In the results of experiments, over 80% tasks are SIMD parallelized and the program with a shuffle instruction and a SIMD instruction reduces computation time by over 90%.

Original languageEnglish
Title of host publicationProceedings - 41st International Conference on Parallel Processing Workshops, ICPPW 2012
Pages375-381
Number of pages7
DOIs
Publication statusPublished - Dec 20 2012
Externally publishedYes
Event41st International Conference on Parallel Processing Workshops, ICPPW 2012 - Pittsburgh, PA, United States
Duration: Sep 10 2012Sep 13 2012

Publication series

NameProceedings of the International Conference on Parallel Processing Workshops
ISSN (Print)1530-2016

Other

Other41st International Conference on Parallel Processing Workshops, ICPPW 2012
CountryUnited States
CityPittsburgh, PA
Period9/10/129/13/12

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All Science Journal Classification (ASJC) codes

  • Software
  • Mathematics(all)
  • Hardware and Architecture

Cite this

Kai, N., Nishinohara, R., & Koide, H. (2012). A SIMD parallelization method for an application for LSI logic simulation. In Proceedings - 41st International Conference on Parallel Processing Workshops, ICPPW 2012 (pp. 375-381). [6337504] (Proceedings of the International Conference on Parallel Processing Workshops). https://doi.org/10.1109/ICPPW.2012.54