A SIMD parallelization method for an application for LSI logic simulation

Natsuki Kai; Ryoji Nishinohara; Hiroshi Koide

doi:10.1109/ICPPW.2012.54

A SIMD parallelization method for an application for LSI logic simulation

Natsuki Kai, Ryoji Nishinohara, Hiroshi Koide

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

This paper proposes and evaluates a SIMD parallelization method for an application for LSI logic simulation. The proposal method converts a net list into a parallel and distributed program code so as to make the code SIMD parallelized. As experiments to evaluate our proposal method, tasks in SIMD arithmetic logical units on Cell/B.E., and we measure that elapsed time. In the results of experiments, over 80% tasks are SIMD parallelized and the program with a shuffle instruction and a SIMD instruction reduces computation time by over 90%.

Original language	English
Title of host publication	Proceedings - 41st International Conference on Parallel Processing Workshops, ICPPW 2012
Pages	375-381
Number of pages	7
DOIs	https://doi.org/10.1109/ICPPW.2012.54
Publication status	Published - Dec 20 2012
Externally published	Yes
Event	41st International Conference on Parallel Processing Workshops, ICPPW 2012 - Pittsburgh, PA, United States Duration: Sep 10 2012 → Sep 13 2012

Publication series

Name	Proceedings of the International Conference on Parallel Processing Workshops
ISSN (Print)	1530-2016

Other

Other	41st International Conference on Parallel Processing Workshops, ICPPW 2012
Country	United States
City	Pittsburgh, PA
Period	9/10/12 → 9/13/12

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All Science Journal Classification (ASJC) codes

Software
Mathematics(all)
Hardware and Architecture

Cite this

Kai, N., Nishinohara, R., & Koide, H. (2012). A SIMD parallelization method for an application for LSI logic simulation. In Proceedings - 41st International Conference on Parallel Processing Workshops, ICPPW 2012 (pp. 375-381). [6337504] (Proceedings of the International Conference on Parallel Processing Workshops). https://doi.org/10.1109/ICPPW.2012.54

A SIMD parallelization method for an application for LSI logic simulation. / Kai, Natsuki; Nishinohara, Ryoji; Koide, Hiroshi.

Proceedings - 41st International Conference on Parallel Processing Workshops, ICPPW 2012. 2012. p. 375-381 6337504 (Proceedings of the International Conference on Parallel Processing Workshops).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kai, N, Nishinohara, R & Koide, H 2012, A SIMD parallelization method for an application for LSI logic simulation. in Proceedings - 41st International Conference on Parallel Processing Workshops, ICPPW 2012., 6337504, Proceedings of the International Conference on Parallel Processing Workshops, pp. 375-381, 41st International Conference on Parallel Processing Workshops, ICPPW 2012, Pittsburgh, PA, United States, 9/10/12. https://doi.org/10.1109/ICPPW.2012.54

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Access to Document

10.1109/ICPPW.2012.54