A simple methodology for on-chip transmission line modeling and optimization for high-speed clock distribution

Translated title of the contribution: A simple methodology for on-chip transmission line modeling and optimization for high-speed clock distribution

Masahiro Ichihashi, Haruichi Kanaya

Research output: Contribution to journalArticle

Translated title of the contributionA simple methodology for on-chip transmission line modeling and optimization for high-speed clock distribution
Original languageUndefined/Unknown
Pages (from-to)SBBC06-SBBC06
JournalJapanese Journal of Applied Physics, Part 2: Letters
Volume58
Issue number0
Publication statusPublished - Mar 27 2019

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