A thermal-aware mapping algorithm for reducing peak temperature of an accelerator deployed in a 3D stack

Farhad Mehdipour, Krishna Chaitanya Nunna, Lovic Gauthier, Koji Inoue, Kazuaki Murakami

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Thermal management is one of the main concerns in three-dimensional integration due to difficulty of dissipating heat through the stack of the integrated circuit. In a 3D stack involving a data-path accelerator, a base processor and memory components, peak temperature reduction is targeted in this paper. A mapping algorithm has been devised in order to distribute operations of data flow graphs evenly over the processing elements of the target accelerator in two steps involving thermal-aware partitioning of input data flow graphs, and thermal-aware mapping of the partitions onto the processing elements. The efficiency of the proposed technique in reducing peak temperature is demonstrated throughout the experiments.

Original languageEnglish
Title of host publication2011 IEEE International 3D Systems Integration Conference, 3DIC 2011
DOIs
Publication statusPublished - Dec 1 2011
Event2011 IEEE International 3D Systems Integration Conference, 3DIC 2011 - Osaka, Japan
Duration: Jan 31 2012Feb 2 2012

Publication series

Name2011 IEEE International 3D Systems Integration Conference, 3DIC 2011

Other

Other2011 IEEE International 3D Systems Integration Conference, 3DIC 2011
CountryJapan
CityOsaka
Period1/31/122/2/12

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All Science Journal Classification (ASJC) codes

  • Control and Systems Engineering

Cite this

Mehdipour, F., Nunna, K. C., Gauthier, L., Inoue, K., & Murakami, K. (2011). A thermal-aware mapping algorithm for reducing peak temperature of an accelerator deployed in a 3D stack. In 2011 IEEE International 3D Systems Integration Conference, 3DIC 2011 [6263034] (2011 IEEE International 3D Systems Integration Conference, 3DIC 2011). https://doi.org/10.1109/3DIC.2012.6263034