An analysis method with failure scenario matrix for specifying unexpected obstacles in embedded systems

Toshiro Mise; Masaaki Hashimoto; Keiichi Katamine; Yasufumi Shinyashiki; Naoyasu Ubayashi; Takako Nakatani

doi:10.1109/APSEC.2005.30

An analysis method with failure scenario matrix for specifying unexpected obstacles in embedded systems

Toshiro Mise, Masaaki Hashimoto, Keiichi Katamine, Yasufumi Shinyashiki, Naoyasu Ubayashi, Takako Nakatani

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

This paper describes an analysis method with failure scenario matrix for specifying unexpected obstacles in order to improve the quality of embedded systems. Although embedded software has become increasingly large in scale and complexity, companies are requiring the software to be developed within shorter periods of time. Therefore, the quality of the software is bound to suffer. This problem is one of the most serious concerns in a coming age of ubiquitous embedded systems. In order to improve the quality, it is very important to specify the forbidden behavior of embedded systems. The forbidden behavior of unexpected obstacles is analyzed by using a matrix and scenarios. This paper provides a detailed description of the analysis method used, in particular the cause, phenomenon, and goal in the scenario, relating them to each other by using a matrix.

Original language	English
Title of host publication	Proceedings - 12th Asia-Pacific Software Engineering Conference, APSEC'05
Pages	447-454
Number of pages	8
DOIs	https://doi.org/10.1109/APSEC.2005.30
Publication status	Published - Dec 1 2005
Externally published	Yes
Event	12th Asia-Pacific Software Engineering Conference, APSEC'05 - Taipei, Taiwan, Province of China Duration: Dec 15 2005 → Dec 17 2005

Publication series

Name	Proceedings - Asia-Pacific Software Engineering Conference, APSEC
Volume	2005
ISSN (Print)	1530-1362

Other

Other	12th Asia-Pacific Software Engineering Conference, APSEC'05
Country	Taiwan, Province of China
City	Taipei
Period	12/15/05 → 12/17/05

All Science Journal Classification (ASJC) codes

Engineering(all)

Access to Document

10.1109/APSEC.2005.30

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Cite this

Mise, T., Hashimoto, M., Katamine, K., Shinyashiki, Y., Ubayashi, N., & Nakatani, T. (2005). An analysis method with failure scenario matrix for specifying unexpected obstacles in embedded systems. In Proceedings - 12th Asia-Pacific Software Engineering Conference, APSEC'05 (pp. 447-454). [1607182] (Proceedings - Asia-Pacific Software Engineering Conference, APSEC; Vol. 2005). https://doi.org/10.1109/APSEC.2005.30

An analysis method with failure scenario matrix for specifying unexpected obstacles in embedded systems. / Mise, Toshiro; Hashimoto, Masaaki; Katamine, Keiichi; Shinyashiki, Yasufumi; Ubayashi, Naoyasu; Nakatani, Takako.

Proceedings - 12th Asia-Pacific Software Engineering Conference, APSEC'05. 2005. p. 447-454 1607182 (Proceedings - Asia-Pacific Software Engineering Conference, APSEC; Vol. 2005).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Mise, T, Hashimoto, M, Katamine, K, Shinyashiki, Y, Ubayashi, N & Nakatani, T 2005, An analysis method with failure scenario matrix for specifying unexpected obstacles in embedded systems. in Proceedings - 12th Asia-Pacific Software Engineering Conference, APSEC'05., 1607182, Proceedings - Asia-Pacific Software Engineering Conference, APSEC, vol. 2005, pp. 447-454, 12th Asia-Pacific Software Engineering Conference, APSEC'05, Taipei, Taiwan, Province of China, 12/15/05. https://doi.org/10.1109/APSEC.2005.30

Mise T, Hashimoto M, Katamine K, Shinyashiki Y, Ubayashi N, Nakatani T. An analysis method with failure scenario matrix for specifying unexpected obstacles in embedded systems. In Proceedings - 12th Asia-Pacific Software Engineering Conference, APSEC'05. 2005. p. 447-454. 1607182. (Proceedings - Asia-Pacific Software Engineering Conference, APSEC). https://doi.org/10.1109/APSEC.2005.30

Mise, Toshiro ; Hashimoto, Masaaki ; Katamine, Keiichi ; Shinyashiki, Yasufumi ; Ubayashi, Naoyasu ; Nakatani, Takako. / An analysis method with failure scenario matrix for specifying unexpected obstacles in embedded systems. Proceedings - 12th Asia-Pacific Software Engineering Conference, APSEC'05. 2005. pp. 447-454 (Proceedings - Asia-Pacific Software Engineering Conference, APSEC).

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