TY - GEN
T1 - An integrated temporal partitioning and mapping framework for handling custom instructions on a reconfigurable functional unit
AU - Mehdipour, Farhad
AU - Noori, Hamid
AU - Saheb Zamani, Morteza
AU - Murakami, Kazuaki
AU - Sedighi, Mehdi
AU - Inoue, Koji
PY - 2006
Y1 - 2006
N2 - Extensible processors allow customization for an application by extending the core instruction set architecture. Extracting appropriate custom instructions is an important phase for implementing an application on an extensible processor with a reconfigurable functional unit. Custom instructions (CIs) usually are extracted from critical portions of applications. This paper presents approaches for CI generation with respect to the RFU constraints to improve speedup of the extensible processor. First, our proposed RFU architecture for an adaptive dynamic extensible processor called AMBER is described. Then, an integrated temporal partitioning and mapping framework is presented to partition and map the CIs on the RFU. In this framework, a mapping aware temporal partitioning algorithm is used to generate CIs which are mappable on the RFU. Temporal partitioning iterates and modifies partitions incrementally to generate CIs. In addition, a mapping algorithm is presented which supports CIs with critical path length more than the RFU depth.
AB - Extensible processors allow customization for an application by extending the core instruction set architecture. Extracting appropriate custom instructions is an important phase for implementing an application on an extensible processor with a reconfigurable functional unit. Custom instructions (CIs) usually are extracted from critical portions of applications. This paper presents approaches for CI generation with respect to the RFU constraints to improve speedup of the extensible processor. First, our proposed RFU architecture for an adaptive dynamic extensible processor called AMBER is described. Then, an integrated temporal partitioning and mapping framework is presented to partition and map the CIs on the RFU. In this framework, a mapping aware temporal partitioning algorithm is used to generate CIs which are mappable on the RFU. Temporal partitioning iterates and modifies partitions incrementally to generate CIs. In addition, a mapping algorithm is presented which supports CIs with critical path length more than the RFU depth.
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U2 - 10.1007/11859802_18
DO - 10.1007/11859802_18
M3 - Conference contribution
AN - SCOPUS:33845192875
SN - 3540400567
SN - 9783540400561
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 219
EP - 230
BT - Advances in Computer Systems Architecture - 11th Asia-Pacific Conference, ACSAC 2006, Proceedings
PB - Springer Verlag
T2 - 11th Asia-Pacific Conference on Advances in Computer Systems Architecture, ACSAC 2006
Y2 - 6 September 2006 through 8 September 2006
ER -