An open source FPGA-optimized out-of-order RISC-V soft processor

Susumu Mashimo, Koji Inoue, Ryota Shioya, Akifumi Fujita, Reoma Matsuo, Seiya Akaki, Akifumi Fukuda, Toru Koizumi, Junichiro Kadomoto, Hidetsugu Irie, Masahiro Goshima

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

High-performance soft processors in field-programmable gate arrays (FPGAs) have become increasingly important as recent large FPGA systems have relied on soft processors to run many complex workloads, like a network software stack. An out-of-order (OoO) superscalar approach is a good candidate to improve performance in such cases, as evidenced from OoO hard processor studies. Recent studies have revealed, however, that conventional OoO processor components do not fit well in an FPGA, and it is thus important to carefully design such components for FPGA characteristics. Hence, we propose the RSD processor: a new, open-source OoO RISC-V soft processor optimized for an FPGA. The RSD supports many aggressive OoO execution features, like speculative scheduling, OoO memory instruction execution and disambiguation, a memory dependence predictor, and a non-blocking cache. While the RSD supports such aggressive features, it also leverages FPGA characteristics. Therefore, it consumes fewer FPGA resources than are consumed by existing OoO soft processors, which do not support such aggressive features well. We first introduce the end result of the RSD microarchitecture design and then describe several novel optimization techniques. The RSD achieves up to 2.5-times higher Dhrystone MIPS while using 60% fewer registers and 64% fewer lookup tables (LUTs) as compared to state-of-the-art, open-source OoO processors.

Original languageEnglish
Title of host publicationProceedings - 2019 International Conference on Field-Programmable Technology, ICFPT 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages63-71
Number of pages9
ISBN (Electronic)9781728129433
DOIs
Publication statusPublished - Dec 2019
Externally publishedYes
Event18th International Conference on Field-Programmable Technology, ICFPT 2019 - Tianjin, China
Duration: Dec 9 2019Dec 13 2019

Publication series

NameProceedings - 2019 International Conference on Field-Programmable Technology, ICFPT 2019
Volume2019-December

Conference

Conference18th International Conference on Field-Programmable Technology, ICFPT 2019
CountryChina
CityTianjin
Period12/9/1912/13/19

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Artificial Intelligence
  • Computational Theory and Mathematics
  • Hardware and Architecture

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  • Cite this

    Mashimo, S., Inoue, K., Shioya, R., Fujita, A., Matsuo, R., Akaki, S., Fukuda, A., Koizumi, T., Kadomoto, J., Irie, H., & Goshima, M. (2019). An open source FPGA-optimized out-of-order RISC-V soft processor. In Proceedings - 2019 International Conference on Field-Programmable Technology, ICFPT 2019 (pp. 63-71). [8977924] (Proceedings - 2019 International Conference on Field-Programmable Technology, ICFPT 2019; Vol. 2019-December). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICFPT47387.2019.00016