Analog circuit implementation and learning algorithm for nearest neighbor classifiers

Kiichi Urahama, Takeshi Nagao

Research output: Contribution to journalArticle

7 Citations (Scopus)

Abstract

Analog electronic circuits are implemented and learning algorithms are presented for Nearest Neighbor (NN) and f-NN. classifiers on the basis of the probabilistic formulation of these classifiers. Electronic networks are compact subthreshold MOS transistor circuits. In the learning algorithm, the place of prototypes and the variance of the probability distribution are optimized by using the steepest descent method for the Kullback-Leibler's information between the network output and the correct membership.

Original languageEnglish
Pages (from-to)723-730
Number of pages8
JournalPattern Recognition Letters
Volume15
Issue number7
DOIs
Publication statusPublished - Jul 1994

Fingerprint

Analog circuits
Learning algorithms
Classifiers
Steepest descent method
Networks (circuits)
MOSFET devices
Probability distributions

All Science Journal Classification (ASJC) codes

  • Software
  • Signal Processing
  • Computer Vision and Pattern Recognition
  • Artificial Intelligence

Cite this

Analog circuit implementation and learning algorithm for nearest neighbor classifiers. / Urahama, Kiichi; Nagao, Takeshi.

In: Pattern Recognition Letters, Vol. 15, No. 7, 07.1994, p. 723-730.

Research output: Contribution to journalArticle

Urahama, Kiichi ; Nagao, Takeshi. / Analog circuit implementation and learning algorithm for nearest neighbor classifiers. In: Pattern Recognition Letters. 1994 ; Vol. 15, No. 7. pp. 723-730.
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