Bloch line memory, an approach to gigabit memory

S. Konishi, Kimihide Matsuyama, I. Chida, S. Kubota, H. Kawahara, M. Ohbo

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18 Citations (Scopus)

Abstract

The Bloch line memory is intended as a post-bubble memory hopefully to realize Gigabit density. However, there remain many uncertainties for this new technology. This paper presents the recent activities in our laboratory such as the stripe domain collapse observation using a high speed photography technique to demonstrate the wall-wall interaction, the stripe domain chopping experiment to convert the presence of a Bloch line to the presence of a bubble, and computer simulation of these phenomina and the propagation of Bloch lines in, a stripe domain wall. The importance of potential wells for Bloch line and domain wall is emphasized for successful bit by bit propagation.

Original languageEnglish
Pages (from-to)1129-1134
Number of pages6
JournalIEEE Transactions on Magnetics
Volume20
Issue number5
DOIs
Publication statusPublished - Jan 1 1984

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All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Konishi, S., Matsuyama, K., Chida, I., Kubota, S., Kawahara, H., & Ohbo, M. (1984). Bloch line memory, an approach to gigabit memory. IEEE Transactions on Magnetics, 20(5), 1129-1134. https://doi.org/10.1109/TMAG.1984.1063450