Boolean technology mapping for both ECL and CMOS circuits based on permissible functions and binary decision diagrams

Hitomi Sato, Noboru Takahashi, Yusuke Matsunaga, Masahiro Fujita

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

A Boolean technology mapping with permissible functions is presented. This technique makes use of complementary intermediate logic functions of circuits. Therefore, complementary outputs of ECL gates can be easily handled. High-quality synthesized ECL circuits and CMOS circuits free of logical redundancies are generated. Technology-independent networks are converted into technology-dependent virtual gates network. Virtual gates have an arbitrary number of fan-ins. CMOS virtual networks consist of only NOR and NAND gates, while ECL virtual networks consists of only OR gates (but each gate has complementary outputs). By considering logic function and the device restrictions these virtual gate networks are translated into cell networks using permissible functions.

Original languageEnglish
Title of host publicationProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
PublisherPubl by IEEE
Pages286-290
Number of pages5
ISBN (Print)O81862079X
Publication statusPublished - Sep 1990
Externally publishedYes
EventProceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors - ICCD '90 - Cambridge, MA, USA
Duration: Sep 17 1990Sep 19 1990

Other

OtherProceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors - ICCD '90
CityCambridge, MA, USA
Period9/17/909/19/90

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Sato, H., Takahashi, N., Matsunaga, Y., & Fujita, M. (1990). Boolean technology mapping for both ECL and CMOS circuits based on permissible functions and binary decision diagrams. In Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors (pp. 286-290). Publ by IEEE.