Charge build-up and its reduction in plasma cleaning process

Kiyoshi Arita, Kazuhiro Noda, Tanemasa Asano

Research output: Contribution to conferencePaper

6 Citations (Scopus)

Abstract

Charge build-up in plasma cleaning process has been investigated from the view points of the plasma uniformity, gas species and pressure, plasma exposure time, anode-cathode distance and substrate (circuit board) configuration. The spatial distribution of plasma parameters in plasma cleaning was diagnosed using a Langmuir probe. The charge build-up was evaluated using metal/nitride/oxide silicon (MNOS) capacitors and metal/oxide/silicon (MOS) capacitors. Gases such as Ar, Ar+H2, Xe and O2 have been investigated. It has been found that the spatial distribution of plasma parameters is uniform, and that the charge build-up in the plasma cleaning is negligibly small as far as test chips are placed without substrates. Use of substrates was found to increase the amount of the charge build-up. The charge build-up was found to depend on size, material and structure of the substrate. It was found that the plasma cleaning with substrates having a conductive surface film such as plated gold film resulted in considerable charge build-up. We found that use of insulator mask or insulating die-bonding paste was very effective to minimize the charge build-up.

Original languageEnglish
Pages92-97
Number of pages6
Publication statusPublished - Jan 1 1998
Externally publishedYes
EventProceedings of the 1998 22nd IEEE/CPMT International Electronics Manufacturing Technology Symposium - Berlin, Ger
Duration: Apr 27 1998Apr 29 1998

Other

OtherProceedings of the 1998 22nd IEEE/CPMT International Electronics Manufacturing Technology Symposium
CityBerlin, Ger
Period4/27/984/29/98

Fingerprint

Cleaning
Plasmas
Substrates
Silicon oxides
Spatial distribution
Capacitors
Langmuir probes
Adhesive pastes
Metals
Gases
Nitrides
Masks
Anodes
Cathodes
Gold
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering

Cite this

Arita, K., Noda, K., & Asano, T. (1998). Charge build-up and its reduction in plasma cleaning process. 92-97. Paper presented at Proceedings of the 1998 22nd IEEE/CPMT International Electronics Manufacturing Technology Symposium, Berlin, Ger, .

Charge build-up and its reduction in plasma cleaning process. / Arita, Kiyoshi; Noda, Kazuhiro; Asano, Tanemasa.

1998. 92-97 Paper presented at Proceedings of the 1998 22nd IEEE/CPMT International Electronics Manufacturing Technology Symposium, Berlin, Ger, .

Research output: Contribution to conferencePaper

Arita, K, Noda, K & Asano, T 1998, 'Charge build-up and its reduction in plasma cleaning process' Paper presented at Proceedings of the 1998 22nd IEEE/CPMT International Electronics Manufacturing Technology Symposium, Berlin, Ger, 4/27/98 - 4/29/98, pp. 92-97.
Arita K, Noda K, Asano T. Charge build-up and its reduction in plasma cleaning process. 1998. Paper presented at Proceedings of the 1998 22nd IEEE/CPMT International Electronics Manufacturing Technology Symposium, Berlin, Ger, .
Arita, Kiyoshi ; Noda, Kazuhiro ; Asano, Tanemasa. / Charge build-up and its reduction in plasma cleaning process. Paper presented at Proceedings of the 1998 22nd IEEE/CPMT International Electronics Manufacturing Technology Symposium, Berlin, Ger, .6 p.
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