Charge build-up in plasma cleaning process before wire-bonding

Kiyoshi Arita, Ryouta Furukawa, Tetsuhiro Iwai, Hiroshi Haji, Isamu Morisako, Tanemasa Asano

Research output: Contribution to conferencePaperpeer-review

2 Citations (Scopus)

Abstract

Charge build-up in plasma cleaning process has been investigated from the view points of the plasma uniformity, gas species and pressure, plasma exposure time and substrate (circuit board) dependence. The spatial distribution of plasma parameters in plasma cleaning was diagnosed using a Langmuir probe. The charge build-up was evaluated using metal/nitride/oxide/silicon (MNOS) capacitors and metal/oxide/silicon (MOS) capacitors. Gases such as Ar, Ar+H2 and O2 have been investigated. It has been found that the spatial distribution of plasma parameters is uniform, and that the charge build-up in the plasma cleaning is negligibly small as far as test chips are placed without substrates. Use of substrates was found to increase the amount of the charge build-up. The charge build-up was found to depend on size, material and structure of the substrate. It was found that the plasma cleaning with substrates having a conductive surface film such as plated gold film resulted in considerable charge build-up. A model to explain these phenomena is discussed.

Original languageEnglish
Pages244-248
Number of pages5
Publication statusPublished - 1997
EventProceedings of the 1997 IEEE/CPMT 20th International Electronic Manufacturing Symposium - Tokyo, Jpn
Duration: Apr 16 1997Apr 18 1997

Other

OtherProceedings of the 1997 IEEE/CPMT 20th International Electronic Manufacturing Symposium
CityTokyo, Jpn
Period4/16/974/18/97

All Science Journal Classification (ASJC) codes

  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering

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