TY - JOUR
T1 - CMP process development for Cu/lowk interconnect schemes - Low selective approach to barrier metal polish for topography correction
AU - Yamada, Yohei
AU - Konishi, Nobuhiro
AU - Ohtake, Atsushi
AU - Kurokawa, Shuhei
AU - Doi, Toshiro
N1 - Copyright:
Copyright 2018 Elsevier B.V., All rights reserved.
PY - 2009/9
Y1 - 2009/9
N2 - Chemical-mechanical polishing (CMP) has been elevated to the forefront of the enabling technology required in a copper (Cu) damascene manufacturing process. Nevertheless, ongoing research and development is necessary in order to meet the requirements for future device generations. In this paper a topography investigation after copper and barrier metal CMP for Cu damascene interconnect with cap-SiO structure, is presented. The procedure is applied to five different selectivity of barrier metal slurry to compare after barrier CMP topography and electrical performance. As a result, a selectivity of Cu/Ta(tantalum)/SiO/ SiOC(silicon oxycarbide) (0.6/1/0.8/0.6) had a better topography correction in barrier metal CMP and reduced short circuit failures on the upper interconnection. Furthermore, optimal direct CMP process on a SiOC film to mitigate the degradation of line-to-line insulating reliability such as time-dependent dielectric breakdown (TDDB) lifetime in SiOC/Cu structure is discussed.
AB - Chemical-mechanical polishing (CMP) has been elevated to the forefront of the enabling technology required in a copper (Cu) damascene manufacturing process. Nevertheless, ongoing research and development is necessary in order to meet the requirements for future device generations. In this paper a topography investigation after copper and barrier metal CMP for Cu damascene interconnect with cap-SiO structure, is presented. The procedure is applied to five different selectivity of barrier metal slurry to compare after barrier CMP topography and electrical performance. As a result, a selectivity of Cu/Ta(tantalum)/SiO/ SiOC(silicon oxycarbide) (0.6/1/0.8/0.6) had a better topography correction in barrier metal CMP and reduced short circuit failures on the upper interconnection. Furthermore, optimal direct CMP process on a SiOC film to mitigate the degradation of line-to-line insulating reliability such as time-dependent dielectric breakdown (TDDB) lifetime in SiOC/Cu structure is discussed.
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U2 - 10.2493/jjspe.75.1073
DO - 10.2493/jjspe.75.1073
M3 - Article
AN - SCOPUS:77955442110
VL - 75
SP - 1073
EP - 1077
JO - Journal of the Japan Society for Precision Engineering
JF - Journal of the Japan Society for Precision Engineering
SN - 0912-0289
IS - 9
ER -