CMP process development for Cu/lowk interconnect schemes - Low selective approach to barrier metal polish for topography correction

Chemical-mechanical polishing (CMP) has been elevated to the forefront of the enabling technology required in a copper (Cu) damascene manufacturing process. Nevertheless, ongoing research and development is necessary in order to meet the requirements for future device generations. In this paper a topography investigation after copper and barrier metal CMP for Cu damascene interconnect with cap-SiO structure, is presented. The procedure is applied to five different selectivity of barrier metal slurry to compare after barrier CMP topography and electrical performance. As a result, a selectivity of Cu/Ta(tantalum)/SiO/ SiOC(silicon oxycarbide) (0.6/1/0.8/0.6) had a better topography correction in barrier metal CMP and reduced short circuit failures on the upper interconnection. Furthermore, optimal direct CMP process on a SiOC film to mitigate the degradation of line-to-line insulating reliability such as time-dependent dielectric breakdown (TDDB) lifetime in SiOC/Cu structure is discussed.