Compliant bump technology for back-side illuminated CMOS image sensor

Tanemasa Asano; Naoya Watanabe; Isao Tsunoda; Yasuhiro Kimiya; Katsuaki Fukunaga; Minoru Handa; Hiroki Arao; Yasuhiro Yamaji; Masahiro Aoyagi; Takao Higashimachi; Koichiro Tanaka; Takayuki Takao; Kimiharu Matsumura; Akihiro Ikeda; Yukinori Kuroki; Toshio Tsurushima

doi:10.1109/ECTC.2009.5073994

Compliant bump technology for back-side illuminated CMOS image sensor

Tanemasa Asano, Naoya Watanabe, Isao Tsunoda, Yasuhiro Kimiya, Katsuaki Fukunaga, Minoru Handa, Hiroki Arao, Yasuhiro Yamaji, Masahiro Aoyagi, Takao Higashimachi, Koichiro Tanaka, Takayuki Takao, Kimiharu Matsumura, Akihiro Ikeda, Yukinori Kuroki, Toshio Tsurushima

Integrated Electronic Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

We have developed a compliant bump technology for 3D chip stacking with the same number of inter-chip connections as that in a VGA (video graphic array, 640 x 480). Using this technology together with a through-Si via (TSV) technology, we demonstrate a prototype of back-side illuminated CMOS image sensor, in which a very-thin rear-illuminated photodiode array is electrically connected to the CMOS readout circuit at a pixel level.

Original language	English
Title of host publication	2009 Proceedings 59th Electronic Components and Technology Conference, ECTC 2009
Pages	40-45
Number of pages	6
DOIs	https://doi.org/10.1109/ECTC.2009.5073994
Publication status	Published - 2009
Event	2009 59th Electronic Components and Technology Conference, ECTC 2009 - San Diego, CA, United States Duration: May 26 2009 → May 29 2009

Publication series

Name	Proceedings - Electronic Components and Technology Conference
ISSN (Print)	0569-5503

Other

Other	2009 59th Electronic Components and Technology Conference, ECTC 2009
Country	United States
City	San Diego, CA
Period	5/26/09 → 5/29/09

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Access to Document

10.1109/ECTC.2009.5073994

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Cite this

Asano, T., Watanabe, N., Tsunoda, I., Kimiya, Y., Fukunaga, K., Handa, M., Arao, H., Yamaji, Y., Aoyagi, M., Higashimachi, T., Tanaka, K., Takao, T., Matsumura, K., Ikeda, A., Kuroki, Y., & Tsurushima, T. (2009). Compliant bump technology for back-side illuminated CMOS image sensor. In 2009 Proceedings 59th Electronic Components and Technology Conference, ECTC 2009 (pp. 40-45). [5073994] (Proceedings - Electronic Components and Technology Conference). https://doi.org/10.1109/ECTC.2009.5073994

Compliant bump technology for back-side illuminated CMOS image sensor. / Asano, Tanemasa; Watanabe, Naoya; Tsunoda, Isao; Kimiya, Yasuhiro; Fukunaga, Katsuaki; Handa, Minoru; Arao, Hiroki; Yamaji, Yasuhiro; Aoyagi, Masahiro; Higashimachi, Takao; Tanaka, Koichiro; Takao, Takayuki; Matsumura, Kimiharu; Ikeda, Akihiro; Kuroki, Yukinori; Tsurushima, Toshio.

2009 Proceedings 59th Electronic Components and Technology Conference, ECTC 2009. 2009. p. 40-45 5073994 (Proceedings - Electronic Components and Technology Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Asano, T, Watanabe, N, Tsunoda, I, Kimiya, Y, Fukunaga, K, Handa, M, Arao, H, Yamaji, Y, Aoyagi, M, Higashimachi, T, Tanaka, K, Takao, T, Matsumura, K, Ikeda, A, Kuroki, Y & Tsurushima, T 2009, Compliant bump technology for back-side illuminated CMOS image sensor. in 2009 Proceedings 59th Electronic Components and Technology Conference, ECTC 2009., 5073994, Proceedings - Electronic Components and Technology Conference, pp. 40-45, 2009 59th Electronic Components and Technology Conference, ECTC 2009, San Diego, CA, United States, 5/26/09. https://doi.org/10.1109/ECTC.2009.5073994

Asano, Tanemasa ; Watanabe, Naoya ; Tsunoda, Isao ; Kimiya, Yasuhiro ; Fukunaga, Katsuaki ; Handa, Minoru ; Arao, Hiroki ; Yamaji, Yasuhiro ; Aoyagi, Masahiro ; Higashimachi, Takao ; Tanaka, Koichiro ; Takao, Takayuki ; Matsumura, Kimiharu ; Ikeda, Akihiro ; Kuroki, Yukinori ; Tsurushima, Toshio. / Compliant bump technology for back-side illuminated CMOS image sensor. 2009 Proceedings 59th Electronic Components and Technology Conference, ECTC 2009. 2009. pp. 40-45 (Proceedings - Electronic Components and Technology Conference).

@inproceedings{4993b4cffec641dd9a0a74780f83c568,

title = "Compliant bump technology for back-side illuminated CMOS image sensor",

abstract = "We have developed a compliant bump technology for 3D chip stacking with the same number of inter-chip connections as that in a VGA (video graphic array, 640 x 480). Using this technology together with a through-Si via (TSV) technology, we demonstrate a prototype of back-side illuminated CMOS image sensor, in which a very-thin rear-illuminated photodiode array is electrically connected to the CMOS readout circuit at a pixel level.",

author = "Tanemasa Asano and Naoya Watanabe and Isao Tsunoda and Yasuhiro Kimiya and Katsuaki Fukunaga and Minoru Handa and Hiroki Arao and Yasuhiro Yamaji and Masahiro Aoyagi and Takao Higashimachi and Koichiro Tanaka and Takayuki Takao and Kimiharu Matsumura and Akihiro Ikeda and Yukinori Kuroki and Toshio Tsurushima",

year = "2009",

doi = "10.1109/ECTC.2009.5073994",

language = "English",

isbn = "9781424444762",

series = "Proceedings - Electronic Components and Technology Conference",

pages = "40--45",

booktitle = "2009 Proceedings 59th Electronic Components and Technology Conference, ECTC 2009",

}

TY - GEN

T1 - Compliant bump technology for back-side illuminated CMOS image sensor

AU - Asano, Tanemasa

AU - Watanabe, Naoya

AU - Tsunoda, Isao

AU - Kimiya, Yasuhiro

AU - Fukunaga, Katsuaki

AU - Handa, Minoru

AU - Arao, Hiroki

AU - Yamaji, Yasuhiro

AU - Aoyagi, Masahiro

AU - Higashimachi, Takao

AU - Tanaka, Koichiro

AU - Takao, Takayuki

AU - Matsumura, Kimiharu

AU - Ikeda, Akihiro

AU - Kuroki, Yukinori

AU - Tsurushima, Toshio

PY - 2009

Y1 - 2009

N2 - We have developed a compliant bump technology for 3D chip stacking with the same number of inter-chip connections as that in a VGA (video graphic array, 640 x 480). Using this technology together with a through-Si via (TSV) technology, we demonstrate a prototype of back-side illuminated CMOS image sensor, in which a very-thin rear-illuminated photodiode array is electrically connected to the CMOS readout circuit at a pixel level.

AB - We have developed a compliant bump technology for 3D chip stacking with the same number of inter-chip connections as that in a VGA (video graphic array, 640 x 480). Using this technology together with a through-Si via (TSV) technology, we demonstrate a prototype of back-side illuminated CMOS image sensor, in which a very-thin rear-illuminated photodiode array is electrically connected to the CMOS readout circuit at a pixel level.

UR - http://www.scopus.com/inward/record.url?scp=70349668536&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=70349668536&partnerID=8YFLogxK

U2 - 10.1109/ECTC.2009.5073994

DO - 10.1109/ECTC.2009.5073994

M3 - Conference contribution

AN - SCOPUS:70349668536

SN - 9781424444762

T3 - Proceedings - Electronic Components and Technology Conference

SP - 40

EP - 45

BT - 2009 Proceedings 59th Electronic Components and Technology Conference, ECTC 2009

T2 - 2009 59th Electronic Components and Technology Conference, ECTC 2009

Y2 - 26 May 2009 through 29 May 2009

ER -