Compliant bump technology for back-side illuminated CMOS image sensor

Tanemasa Asano, Naoya Watanabe, Isao Tsunoda, Yasuhiro Kimiya, Katsuaki Fukunaga, Minoru Handa, Hiroki Arao, Yasuhiro Yamaji, Masahiro Aoyagi, Takao Higashimachi, Koichiro Tanaka, Takayuki Takao, Kimiharu Matsumura, Akihiro Ikeda, Yukinori Kuroki, Toshio Tsurushima

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

We have developed a compliant bump technology for 3D chip stacking with the same number of inter-chip connections as that in a VGA (video graphic array, 640 x 480). Using this technology together with a through-Si via (TSV) technology, we demonstrate a prototype of back-side illuminated CMOS image sensor, in which a very-thin rear-illuminated photodiode array is electrically connected to the CMOS readout circuit at a pixel level.

Original languageEnglish
Title of host publication2009 Proceedings 59th Electronic Components and Technology Conference, ECTC 2009
Pages40-45
Number of pages6
DOIs
Publication statusPublished - 2009
Event2009 59th Electronic Components and Technology Conference, ECTC 2009 - San Diego, CA, United States
Duration: May 26 2009May 29 2009

Publication series

NameProceedings - Electronic Components and Technology Conference
ISSN (Print)0569-5503

Other

Other2009 59th Electronic Components and Technology Conference, ECTC 2009
Country/TerritoryUnited States
CitySan Diego, CA
Period5/26/095/29/09

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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