TY - GEN
T1 - Cutoff Current Capability of SiC-MOSFETs with Parallel Connected Varistor under UIS Condition
AU - Saito, Wataru
AU - Lou, Zaiqi
AU - Nishizawa, Shinichi
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - Unclamped inductive switching (UIS) robustness of SiC MOSFETs with parallel connected varistor was evaluated to design the cutoff current capability of solid-state circuit breakers. Because the operation of UIS tests is similar to that in the interruption of solid-state circuit breakers, UIS tests of SiC MOSFETs without varistor and with a parallel-connected varistor were implemented. It was found that the cutoff current of SiC MOSFETs with the varistor was 3 to 6 times larger than that without varistor. The index of rating current for cutoff current capability was changed by parallel varistor connection, because the destruction mechanism of SiC MOSFETs was changed because of the change in self-heating timing during the UIS. From dependence of cutoff current on rating current, load inductance and varistor voltage, it is verified that the cutoff current of SiC MOSFET with varistor was limited by saturation current and current filament.
AB - Unclamped inductive switching (UIS) robustness of SiC MOSFETs with parallel connected varistor was evaluated to design the cutoff current capability of solid-state circuit breakers. Because the operation of UIS tests is similar to that in the interruption of solid-state circuit breakers, UIS tests of SiC MOSFETs without varistor and with a parallel-connected varistor were implemented. It was found that the cutoff current of SiC MOSFETs with the varistor was 3 to 6 times larger than that without varistor. The index of rating current for cutoff current capability was changed by parallel varistor connection, because the destruction mechanism of SiC MOSFETs was changed because of the change in self-heating timing during the UIS. From dependence of cutoff current on rating current, load inductance and varistor voltage, it is verified that the cutoff current of SiC MOSFET with varistor was limited by saturation current and current filament.
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U2 - 10.1109/WiPDAEurope55971.2022.9936060
DO - 10.1109/WiPDAEurope55971.2022.9936060
M3 - Conference contribution
AN - SCOPUS:85142508209
T3 - IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe, WiPDA Europe 2022
BT - IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe, WiPDA Europe 2022
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe, WiPDA Europe 2022
Y2 - 18 September 2022 through 22 September 2022
ER -