High-strain Si-pillars are desirable for achieving high-speed three-dimensional transistors. The effects of postannealing (400-1150C) on strain-enhancement in Si-pillars covered with Si3N4 stress-liners are investigated. Before annealing, the Si3N 4 stress-liners induce strain in Si, where the direction of strain, which can be compressive or tensile, depends on the Si3N4 deposition parameters. After postannealing (800C), the strain becomes highly compressive, because of dehydrogenation-induced structural relaxation in Si 3N4 films. Consequently, compressive strains (1.6) are induced in the 200-nm-thick Si-pillars covered in 200-nm-thick Si 3N4 films after high temperature postannealing (1000-1150C). This strain-enhancement technique is useful for the realization of advanced high-speed three-dimensional transistors.
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
- Materials Science(all)
- Chemical Engineering(all)
- Physical and Theoretical Chemistry