Design and analysis of a bus bar structure for a medium voltage inverter

Masato Ando, Keiji Wada, Kazuto Takao, Takeo Kanai, Shinichi Nishizawa, Hiromichi Ohashi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

15 Citations (Scopus)

Abstract

In order to suppress overvoltage of power devices and noise voltages of inverters, it is essential to analyze the DC-side inductance of the inverter. This paper presents a design procedure of an optimum structure for a 10-kV, 400-kVA three-level inverter. Rather than using 3D-FEM software, the bus bar inductance for the medium voltage inverter is calculated based on a partial inductance method. An inductance map is useful for determining the relationship between the bus bar structure and the inductance value and for designing the low-inductance structure. In addition, the calculation results of the bus bar inductance correspond to the measurement results, confirming the validity of the proposed method.

Original languageEnglish
Title of host publicationProceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011
Publication statusPublished - Oct 11 2011
Externally publishedYes
Event2011 14th European Conference on Power Electronics and Applications, EPE 2011 - Birmingham, United Kingdom
Duration: Aug 30 2011Sep 1 2011

Publication series

NameProceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011

Other

Other2011 14th European Conference on Power Electronics and Applications, EPE 2011
CountryUnited Kingdom
CityBirmingham
Period8/30/119/1/11

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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  • Cite this

    Ando, M., Wada, K., Takao, K., Kanai, T., Nishizawa, S., & Ohashi, H. (2011). Design and analysis of a bus bar structure for a medium voltage inverter. In Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011 [6020404] (Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011).