TY - JOUR
T1 - Design and Application of Virtual Inductance of Square-Shaped Defected Ground Structure in 0.18-$\mu \text{m}$ CMOS Technology
AU - Jahan, Nusrat
AU - Ab Rahim, Siti Amalina Enche
AU - Barakat, Adel
AU - Kaho, Takana
AU - Pokharel, Ramesh K.
N1 - Funding Information:
1 Faculty of Information Science and Electrical Engineering, Kyushu University, Fukuoka 8190395, Japan 2 Microstrip Circuits Department, Electronics Research Institute, Giza 12622, Egypt 3 NTT Network Innovation Laboratories, Yokosuka 239-0847, Japan CORRESPONDING AUTHOR: N. JAHAN (e-mail: 3IE16609S@s.kyushu-u.ac.jp) This work was supported in part by the Grant-in-Aid for Scientific Research under Grant 16K06301, and in part by the VLSI Design and Education Center, University of Tokyo, in Collaboration with Cadence and Keysight Corporations.
Publisher Copyright:
© 2013 IEEE.
PY - 2017/9
Y1 - 2017/9
N2 - This paper investigates a possibility of application of a virtual inductor realized by an integrated defected ground structure (DGS) to design a front-end circuit in CMOS technology. Two types of DGS are analyzed and found that the inductance realized by a square-shaped DGS achieves smaller size and higher quality factor than an H-shaped DGS. Then, a 15-GHz low phase noise voltage-controlled oscillator (VCO) employing the proposed square-shaped DGS in 0.18-$\mu \text{m}$ 1P6M CMOS technology is designed. The fabricated VCO operates from 15.2 to 16.12 GHz and consumes 5-mW power. The measured phase noise is-132.08 dBc/Hz at 10-MHz offset frequency, and this results in the figure of merit (FoM) and FoM taking account of the area to be 189.1 and 199.9 dB, respectively.
AB - This paper investigates a possibility of application of a virtual inductor realized by an integrated defected ground structure (DGS) to design a front-end circuit in CMOS technology. Two types of DGS are analyzed and found that the inductance realized by a square-shaped DGS achieves smaller size and higher quality factor than an H-shaped DGS. Then, a 15-GHz low phase noise voltage-controlled oscillator (VCO) employing the proposed square-shaped DGS in 0.18-$\mu \text{m}$ 1P6M CMOS technology is designed. The fabricated VCO operates from 15.2 to 16.12 GHz and consumes 5-mW power. The measured phase noise is-132.08 dBc/Hz at 10-MHz offset frequency, and this results in the figure of merit (FoM) and FoM taking account of the area to be 189.1 and 199.9 dB, respectively.
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U2 - 10.1109/JEDS.2017.2728686
DO - 10.1109/JEDS.2017.2728686
M3 - Article
AN - SCOPUS:85028920040
SN - 2168-6734
VL - 5
SP - 299
EP - 305
JO - IEEE Journal of the Electron Devices Society
JF - IEEE Journal of the Electron Devices Society
IS - 5
M1 - 7984797
ER -