Abstract
We designed and measured test element group wafers thinned to 10μm for 3D system in package. The n-well - p-Si diodes in 10 μm thick wafer showed increasing of the reverse saturation current in comparison to the currents in 20μm, 30 μm or 640 μm thick wafer. While the pMOSFETs and nMOSFETs in 10μm thick wafer showed no degradation of mobility, sub-threshold swing and threshold voltage. Defects might be induced by mechanical stress during wafer back grinding process near wafer back side, within a few micron-meters from the wafer back surface.
| Original language | English |
|---|---|
| Title of host publication | IEEE International Conference on Microelectronic Test Structures |
| Pages | 161-164 |
| Number of pages | 4 |
| Publication status | Published - 2004 |
| Event | Proceedings of the 2004 International Conference on Microelectronic Test Structures (ICMTS 2004) - Awaji, Japan Duration: Mar 22 2004 → Mar 25 2004 |
Other
| Other | Proceedings of the 2004 International Conference on Microelectronic Test Structures (ICMTS 2004) |
|---|---|
| Country | Japan |
| City | Awaji |
| Period | 3/22/04 → 3/25/04 |
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All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
Cite this
Design and measurements of test element group wafer thinned to 10 μm for 3D system in package. / Ikeda, Akihiro; Kuwata, Tomonori; Kajiwara, Satoru; Fujimura, Tsuyoshi; Kuriyaki, Hisao; Hattori, Reiji; Ogi, Hiroshi; Hamaguchi, Kiyoshi; Kuroki, Yukinori.
IEEE International Conference on Microelectronic Test Structures. 2004. p. 161-164.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Design and measurements of test element group wafer thinned to 10 μm for 3D system in package
AU - Ikeda, Akihiro
AU - Kuwata, Tomonori
AU - Kajiwara, Satoru
AU - Fujimura, Tsuyoshi
AU - Kuriyaki, Hisao
AU - Hattori, Reiji
AU - Ogi, Hiroshi
AU - Hamaguchi, Kiyoshi
AU - Kuroki, Yukinori
PY - 2004
Y1 - 2004
N2 - We designed and measured test element group wafers thinned to 10μm for 3D system in package. The n-well - p-Si diodes in 10 μm thick wafer showed increasing of the reverse saturation current in comparison to the currents in 20μm, 30 μm or 640 μm thick wafer. While the pMOSFETs and nMOSFETs in 10μm thick wafer showed no degradation of mobility, sub-threshold swing and threshold voltage. Defects might be induced by mechanical stress during wafer back grinding process near wafer back side, within a few micron-meters from the wafer back surface.
AB - We designed and measured test element group wafers thinned to 10μm for 3D system in package. The n-well - p-Si diodes in 10 μm thick wafer showed increasing of the reverse saturation current in comparison to the currents in 20μm, 30 μm or 640 μm thick wafer. While the pMOSFETs and nMOSFETs in 10μm thick wafer showed no degradation of mobility, sub-threshold swing and threshold voltage. Defects might be induced by mechanical stress during wafer back grinding process near wafer back side, within a few micron-meters from the wafer back surface.
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M3 - Conference contribution
SP - 161
EP - 164
BT - IEEE International Conference on Microelectronic Test Structures
ER -