Design of high linearity low flicker noise 5.2 GHz down-conversion mixer for direct conversion receiver

Ramesh Pokharel, Y. Yano, M. A. Abdelghany, Haruichi Kanaya, K. Yoshida

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

A design of high linearity (IIP3), low flicker noise (NF), high conversion gain (CG) double-balanced Gilbert-cell mixer (DBGCM) is presented. Since the performance of a direct conversion receiver (DCR) is strongly affected by linearity and flicker noise (1/f) of a mixer in receiving side, a hybrid technique of dynamic current injection (DCI), a tuned inductor in switching pair and direct superposition method are employed to improve the flicker noise corner frequency, conversion gain and IIP3 of a DBGCM without affecting the other parameters. The mixer is designed and implemented on 0.18 μm CMOS technology and a few of the measured results were presented. The proposed mixer has a simulated conversion gain of 14dB, while the IIP3 at +13 dBm, single side band (SSB) noise figure is 8.4dB (@ 100kHz).

Original languageEnglish
Title of host publicationProceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
Pages64-67
Number of pages4
DOIs
Publication statusPublished - Dec 1 2010
Event2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 - Kuala Lumpur, Malaysia
Duration: Dec 6 2010Dec 9 2010

Other

Other2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
CountryMalaysia
CityKuala Lumpur
Period12/6/1012/9/10

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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    Pokharel, R., Yano, Y., Abdelghany, M. A., Kanaya, H., & Yoshida, K. (2010). Design of high linearity low flicker noise 5.2 GHz down-conversion mixer for direct conversion receiver. In Proceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 (pp. 64-67). [5774950] https://doi.org/10.1109/APCCAS.2010.5774950