TY - JOUR
T1 - Design of Low-Loss Coplanar Transmission Lines Using Distributed Loading for Millimeter-Wave Power Divider/Combiner Applications in 0.18-μm CMOS Technology
AU - Abd El-Hameed, Anwer Sayed
AU - Barakat, Adel
AU - Abdel-Rahman, Adel B.
AU - Allam, Ahmed
AU - Pokharel, Ramesh K.
PY - 2018/12
Y1 - 2018/12
N2 - This paper presents a new type of a low-loss miniaturized coplanar-waveguide (CPW) transmission line (TL) by employing distributed loading, capacitors and inductors, in 0.18-μm complementary metal-oxide-semiconductor (CMOS) technology. The capacitors are realized by vertical parallel plates made of vias, and a group of open stubs inserted to the signal line, whereas the inductors are realized by high impedance lines. Then, the proposed CPW-TL is employed to design a miniaturized millimeter wave ultra-wideband low-loss Wilkinson power divider/combiner (WPD/C). The proposed distributed loading results in reducing each WPD/C arm length by more than 50% without changing its characteristic impedance and insertion loss (IL). The design is fabricated in 0.18-μm CMOS technology and tested. The measured results show a wideband performance from dc to 67 GHz with 1-dB IL and isolation greater than 15 dB from 36 to 67 GHz. In addition, the fabricated WPD/C achieves an excellent amplitude imbalance and phase imbalance of less than 0.16 dB and 0.45°, respectively. The core chip size is 336 × 165 μm 2 , which is almost 32.8% compact compared to the recently proposed WPD in the same technology.
AB - This paper presents a new type of a low-loss miniaturized coplanar-waveguide (CPW) transmission line (TL) by employing distributed loading, capacitors and inductors, in 0.18-μm complementary metal-oxide-semiconductor (CMOS) technology. The capacitors are realized by vertical parallel plates made of vias, and a group of open stubs inserted to the signal line, whereas the inductors are realized by high impedance lines. Then, the proposed CPW-TL is employed to design a miniaturized millimeter wave ultra-wideband low-loss Wilkinson power divider/combiner (WPD/C). The proposed distributed loading results in reducing each WPD/C arm length by more than 50% without changing its characteristic impedance and insertion loss (IL). The design is fabricated in 0.18-μm CMOS technology and tested. The measured results show a wideband performance from dc to 67 GHz with 1-dB IL and isolation greater than 15 dB from 36 to 67 GHz. In addition, the fabricated WPD/C achieves an excellent amplitude imbalance and phase imbalance of less than 0.16 dB and 0.45°, respectively. The core chip size is 336 × 165 μm 2 , which is almost 32.8% compact compared to the recently proposed WPD in the same technology.
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U2 - 10.1109/TMTT.2018.2873381
DO - 10.1109/TMTT.2018.2873381
M3 - Article
AN - SCOPUS:85055726512
VL - 66
SP - 5221
EP - 5229
JO - IEEE Transactions on Microwave Theory and Techniques
JF - IEEE Transactions on Microwave Theory and Techniques
SN - 0018-9480
IS - 12
M1 - 8506598
ER -