Development of n+-in-p planar pixel quadsensor flip-chipped with FE-I4 readout ASICs

Y. Unno, S. Kamada, K. Yamamura, H. Yamamoto, K. Hanagaki, R. Hori, Y. Ikegami, K. Nakamura, Y. Takubo, R. Takashima, J. Tojo, T. Kono, R. Nagai, S. Saito, K. Sugibayashi, M. Hirose, O. Jinnouchi, S. Sato, H. Sawai, K. HaraKz Sato, Kj Sato, S. Iwabuchi, J. Suzuki

Research output: Contribution to journalArticlepeer-review

Abstract

We have developed flip-chip modules applicable to the pixel detector for the HL-LHC. New radiation-tolerant n+-in-p planar pixel sensors of a size of four FE-I4 application-specific integrated circuits (ASICs) are laid out in a 6-in wafer. Variation in readout connection for the pixels at the boundary of ASICs is implemented in the design of quadsensors. Bump bonding technology is developed for four ASICs onto one quadsensor. Both sensors and ASICs are thinned to 150 μm before bump bonding, and are held flat with vacuum chucks. Using lead-free SnAg solder bumps, we encounter deficiency with large areas of disconnected bumps after thermal stress treatment, including irradiation. Surface oxidation of the solder bumps is identified as a critical source of this deficiency after bump bonding trials, using SnAg bumps with solder flux, indium bumps, and SnAg bumps with a newly-introduced hydrogen-reflow process. With hydrogen-reflow, we establish flux-less bump bonding technology with SnAg bumps, appropriate for mass production of the flip-chip modules with thin sensors and thin ASICs.

Original languageEnglish
Article numberC01084
JournalJournal of Instrumentation
Volume12
Issue number1
DOIs
Publication statusPublished - Jan 30 2017

All Science Journal Classification (ASJC) codes

  • Mathematical Physics
  • Instrumentation

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