Abstract
Entire systems embedded in a chip and consisting of a processor, memory, and system-specific peripheral hardware are now commonly contained in commodity electronic devices. Cost minimization of these systems is of paramount economic importance to manufactures of these devices. By employing a variable configuration processor in conjunction with a multi-precision compiler generator, we show that there are situations in which considerable system cost reduction can be obtained by synthesizing a CPU that is narrower than the largest variable in the application program.
| Original language | English |
|---|---|
| Pages (from-to) | 974-981 |
| Number of pages | 8 |
| Journal | IEICE Transactions on Information and Systems |
| Volume | E80-D |
| Issue number | 10 |
| Publication status | Published - Jan 1 1997 |
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All Science Journal Classification (ASJC) codes
- Software
- Hardware and Architecture
- Computer Vision and Pattern Recognition
- Electrical and Electronic Engineering
- Artificial Intelligence
Cite this
Embedded system cost optimization via data path width adjustment. / Shackleford, Barry; Yasuda, Mitsuhiro; Okushi, Etsuko; Koizumi, Hisao; Tomiyama, Hiroyuki; Inoue, Akihiko; Yasuura, Hiroto.
In: IEICE Transactions on Information and Systems, Vol. E80-D, No. 10, 01.01.1997, p. 974-981.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Embedded system cost optimization via data path width adjustment
AU - Shackleford, Barry
AU - Yasuda, Mitsuhiro
AU - Okushi, Etsuko
AU - Koizumi, Hisao
AU - Tomiyama, Hiroyuki
AU - Inoue, Akihiko
AU - Yasuura, Hiroto
PY - 1997/1/1
Y1 - 1997/1/1
N2 - Entire systems embedded in a chip and consisting of a processor, memory, and system-specific peripheral hardware are now commonly contained in commodity electronic devices. Cost minimization of these systems is of paramount economic importance to manufactures of these devices. By employing a variable configuration processor in conjunction with a multi-precision compiler generator, we show that there are situations in which considerable system cost reduction can be obtained by synthesizing a CPU that is narrower than the largest variable in the application program.
AB - Entire systems embedded in a chip and consisting of a processor, memory, and system-specific peripheral hardware are now commonly contained in commodity electronic devices. Cost minimization of these systems is of paramount economic importance to manufactures of these devices. By employing a variable configuration processor in conjunction with a multi-precision compiler generator, we show that there are situations in which considerable system cost reduction can be obtained by synthesizing a CPU that is narrower than the largest variable in the application program.
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UR - http://www.scopus.com/inward/citedby.url?scp=0031248965&partnerID=8YFLogxK
M3 - Article
AN - SCOPUS:0031248965
VL - E80-D
SP - 974
EP - 981
JO - IEICE Transactions on Information and Systems
JF - IEICE Transactions on Information and Systems
SN - 0916-8532
IS - 10
ER -