Encapsulated gate-all-around InAs nanowire field-effect transistors

Satoshi Sasaki, Kouta Tateno, Guoqiang Zhang, Henri Suominen, Yuichi Harada, Shiro Saito, Akira Fujiwara, Tetsuomi Sogawa, Koji Muraki

Research output: Contribution to journalArticle

13 Citations (Scopus)

Abstract

We report the fabrication of lateral gate-all-around InAs nanowire field-effect transistors whose gate overlaps the source and drain electrodes and thus fully encapsulates the nanowire channel. They feature large drive current and transconductance that surpass those of conventional non-gate-overlap devices. The improved device characteristics can be attributed to the elimination of access resistance associated with ungated segments between the gate and source/drain electrodes. Our data also reveal a correlation between the normalized transconductance and the threshold voltage, which points to a beneficial effect of our wet-etching procedure performed prior to the atomic-layer-deposition of the gate dielectric.

Original languageEnglish
Article number213502
JournalApplied Physics Letters
Volume103
Issue number21
DOIs
Publication statusPublished - Nov 18 2013
Externally publishedYes

Fingerprint

nanowires
field effect transistors
transconductance
electrodes
atomic layer epitaxy
threshold voltage
elimination
etching
fabrication

All Science Journal Classification (ASJC) codes

  • Physics and Astronomy (miscellaneous)

Cite this

Sasaki, S., Tateno, K., Zhang, G., Suominen, H., Harada, Y., Saito, S., ... Muraki, K. (2013). Encapsulated gate-all-around InAs nanowire field-effect transistors. Applied Physics Letters, 103(21), [213502]. https://doi.org/10.1063/1.4832058

Encapsulated gate-all-around InAs nanowire field-effect transistors. / Sasaki, Satoshi; Tateno, Kouta; Zhang, Guoqiang; Suominen, Henri; Harada, Yuichi; Saito, Shiro; Fujiwara, Akira; Sogawa, Tetsuomi; Muraki, Koji.

In: Applied Physics Letters, Vol. 103, No. 21, 213502, 18.11.2013.

Research output: Contribution to journalArticle

Sasaki, S, Tateno, K, Zhang, G, Suominen, H, Harada, Y, Saito, S, Fujiwara, A, Sogawa, T & Muraki, K 2013, 'Encapsulated gate-all-around InAs nanowire field-effect transistors', Applied Physics Letters, vol. 103, no. 21, 213502. https://doi.org/10.1063/1.4832058
Sasaki S, Tateno K, Zhang G, Suominen H, Harada Y, Saito S et al. Encapsulated gate-all-around InAs nanowire field-effect transistors. Applied Physics Letters. 2013 Nov 18;103(21). 213502. https://doi.org/10.1063/1.4832058
Sasaki, Satoshi ; Tateno, Kouta ; Zhang, Guoqiang ; Suominen, Henri ; Harada, Yuichi ; Saito, Shiro ; Fujiwara, Akira ; Sogawa, Tetsuomi ; Muraki, Koji. / Encapsulated gate-all-around InAs nanowire field-effect transistors. In: Applied Physics Letters. 2013 ; Vol. 103, No. 21.
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