High-speed fully depleted thin-film transistors (TFTs) for low-power consumption are required for next-generation electronics, such as three-dimensional large-scale integrated circuits and advanced system-in-displays. For this purpose, high-carrier-mobility semiconductor thin-films (thickness: ≤∼50 nm) on insulator structures should be fabricated under low-temperature processing conditions (≤500 °C). To achieve this, solid-phase crystallization of amorphous GeSn (a-GeSn) with low Sn concentration (2%) is investigated for a wide range of film thicknesses (30 - 200 nm), where thin a-Si underlayers (thickness: 0 - 20 nm) are introduced between a-GeSn films and substrates. GeSn is polycrystallized by annealing at 450 °C, keeping Si underlayers amorphous. Crystal grains of almost identical sizes are obtained for GeSn thicknesses of 30 - 50 nm, though grain sizes significantly decrease for thicknesses exceeding 50 nm owing to enhanced bulk nucleation. A detailed analysis of GeSn films (thickness: 50 nm) reveals that grain sizes are decreased by introducing a-Si underlayers (thickness: 3 - 20 nm), e.g., from ∼10 μm to 2 - 3 μm. This phenomenon is attributed to the change in dominant nucleation sites from the interface to the bulk, which significantly decreases grain-boundary scattering of carriers through a decrease in the barrier heights at grain boundaries. As a result, a high carrier mobility of 200 - 300 cm2/V s is realized for GeSn thin-films (thickness: 30 - 50 nm) grown with a-Si underlayers. The mobility (200 - 300 cm2/V s) is the largest ever reported data for Ge and GeSn thin-films (thickness: 30 - 50 nm) grown at low temperatures (≤500 °C). This technique will facilitate the realization of high-speed fully depleted TFTs for next-generation electronics.
All Science Journal Classification (ASJC) codes
- Physics and Astronomy (miscellaneous)